qemu/target
Max Filippov 75eed0e5f7 target/xtensa: implement DIWBUI.P opcode
This is a recent addition to the set of data cache opcodes.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-05-14 13:19:35 -07:00
..
alpha tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
arm target-arm queue: 2019-05-08 00:06:43 +01:00
cris tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
hppa decodetree: Add DisasContext argument to !function expanders 2019-05-06 11:18:34 -07:00
i386 Add tcg_gen_extract2_*. 2019-04-28 11:43:10 +01:00
lm32 tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
m68k tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
microblaze tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
mips tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
moxie tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
nios2 Add Nios II semihosting support. 2019-04-29 16:09:51 +01:00
openrisc target/openrisc: Fix LGPL information in the file headers 2019-05-08 17:45:54 +02:00
ppc Add tcg_gen_extract2_*. 2019-04-28 11:43:10 +01:00
riscv decodetree: Add DisasContext argument to !function expanders 2019-05-06 11:18:34 -07:00
s390x Add tcg_gen_extract2_*. 2019-04-28 11:43:10 +01:00
sh4 target/sh4: Fix LGPL information in the file headers 2019-05-08 17:45:54 +02:00
sparc tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
tilegx tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
tricore tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
unicore32 tcg: Hoist max_insns computation to tb_gen_code 2019-04-24 13:04:33 -07:00
xtensa target/xtensa: implement DIWBUI.P opcode 2019-05-14 13:19:35 -07:00