75d0e6b5c6
Per https://docs.xilinx.com/r/en-US/ug1085-zynq-ultrascale-trm/Message-Format
Message Format
The same message format is used for RXFIFO, TXFIFO, and TXHPB.
Each message includes four words (16 bytes). Software must read
and write all four words regardless of the actual number of data
bytes and valid fields in the message.
There is no mention in this reference manual about what the
hardware does when not all four words are written. To fix the
reported underflow behavior when DATA2 register is written,
I choose to fill the data with the previous content of the
ID / DLC / DATA1 registers, which is how I expect hardware
would do.
Note there is no hardware flag raised under such condition.
Reported-by: Qiang Liu <cyruscyliu@gmail.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231124183325.95392-2-philmd@linaro.org
Fixes:
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.. | ||
can_kvaser_pci.c | ||
can_mioe3680_pci.c | ||
can_pcm3680_pci.c | ||
can_sja1000.c | ||
can_sja1000.h | ||
ctu_can_fd_frame.h | ||
ctu_can_fd_regs.h | ||
ctucan_core.c | ||
ctucan_core.h | ||
ctucan_pci.c | ||
meson.build | ||
trace-events | ||
trace.h | ||
xlnx-versal-canfd.c | ||
xlnx-zynqmp-can.c |