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qemu/target/mips/tcg
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Richard Henderson 157f75435e MIPS patches queue 
- Fine-grained MAINTAINERS sections
 - Fix MSA MADDV.B / MSUBV.B opcodes
 - Convert MSA opcodes to decodetree
 - Correct Loongson-3A4000 MSAIR register
 - Do not accept ELF nanoMIPS binaries on linux-user
 - Use ISA instead of PCI interrupts in VT82C686 PCI device
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Merge remote-tracking branch 'remotes/philmd/tags/mips-20211102' into staging

MIPS patches queue

- Fine-grained MAINTAINERS sections
- Fix MSA MADDV.B / MSUBV.B opcodes
- Convert MSA opcodes to decodetree
- Correct Loongson-3A4000 MSAIR register
- Do not accept ELF nanoMIPS binaries on linux-user
- Use ISA instead of PCI interrupts in VT82C686 PCI device

# gpg: Signature made Tue 02 Nov 2021 09:41:04 AM EDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]

* remotes/philmd/tags/mips-20211102: (41 commits)
  Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too"
  hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts
  usb/uhci: Replace pci_set_irq with qemu_set_irq
  usb/uhci: Disallow user creating a vt82c686-uhci-pci device
  usb/uhci: Misc clean up
  target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU
  target/mips: Fix Loongson-3A4000 MSAIR config register
  target/mips: Remove one MSA unnecessary decodetree overlap group
  target/mips: Remove generic MSA opcode
  target/mips: Convert CTCMSA opcode to decodetree
  target/mips: Convert CFCMSA opcode to decodetree
  target/mips: Convert MSA MOVE.V opcode to decodetree
  target/mips: Convert MSA COPY_S and INSERT opcodes to decodetree
  target/mips: Convert MSA COPY_U opcode to decodetree
  target/mips: Convert MSA ELM instruction format to decodetree
  target/mips: Convert MSA 3R instruction format to decodetree (part 4/4)
  target/mips: Convert MSA 3R instruction format to decodetree (part 3/4)
  target/mips: Convert MSA 3R instruction format to decodetree (part 2/4)
  target/mips: Convert MSA 3R instruction format to decodetree (part 1/4)
  target/mips: Convert MSA 3RF instruction format to decodetree (DF_WORD)
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02 15:12:11 -04:00
..
sysemu target/mips: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
dsp_helper.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
exception.c target/mips: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
fpu_helper.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
ldst_helper.c target/mips: Replace GET_LMASK64() macro by get_lmask(64) function 2021-08-25 13:02:14 +02:00
lmmi_helper.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
meson.build target/mips: Make mips_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
micromips_translate.c.inc accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
mips16e_translate.c.inc accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
msa_helper.c target/mips: Fix MSA MSUBV.B opcode 2021-11-02 14:32:32 +01:00
msa_helper.h.inc target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
msa_translate.c target/mips: Remove generic MSA opcode 2021-11-02 14:32:32 +01:00
msa.decode target/mips: Remove one MSA unnecessary decodetree overlap group 2021-11-02 14:32:32 +01:00
mxu_translate.c target/mips: Fix gen_mxu_s32ldd_s32lddr 2021-06-29 10:04:57 -07:00
nanomips_translate.c.inc target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6 2021-10-17 18:35:49 +02:00
op_helper.c target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c 2021-08-25 13:02:14 +02:00
rel6_translate.c target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
rel6.decode target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
sysemu_helper.h.inc target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c 2021-05-02 16:49:35 +02:00
tcg-internal.h target/mips: Make mips_cpu_tlb_fill sysemu only 2021-11-02 07:00:52 -04:00
trace-events target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
trace.h target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
translate_addr_const.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
translate.c target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn() 2021-10-18 00:41:36 +02:00
translate.h target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian() 2021-08-25 13:02:14 +02:00
tx79_translate.c target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
tx79.decode target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
txx9_translate.c target/mips: Move TCG source files under tcg/ sub directory 2021-05-02 16:49:35 +02:00
vr54xx_helper.c target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c 2021-08-25 13:02:14 +02:00
vr54xx_helper.h.inc target/mips: Extract NEC Vr54xx helper definitions 2021-08-25 13:02:14 +02:00
vr54xx_translate.c target/mips: Convert Vr54xx MSA* opcodes to decodetree 2021-08-25 13:02:14 +02:00
vr54xx.decode target/mips: Convert Vr54xx MSA* opcodes to decodetree 2021-08-25 13:02:14 +02:00