qemu/hw/intc
Jens Wiklander fea8a08e16 hw/intc/gic: RAZ/WI non-sec access to sec interrupts
Treat non-secure accesses to registers and bits in registers of secure
interrupts as RAZ/WI.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Message-id: 1464273945-2055-1-git-send-email-jens.wiklander@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06 16:59:29 +01:00
..
Makefile.objs
allwinner-a10-pic.c
apic.c
apic_common.c
arm_gic.c
arm_gic_common.c
arm_gic_kvm.c
arm_gicv2m.c
arm_gicv3_common.c
arm_gicv3_kvm.c
armv7m_nvic.c
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c
exynos4210_combiner.c
exynos4210_gic.c
gic_internal.h
grlib_irqmp.c
heathrow_pic.c
i8259.c
i8259_common.c
imx_avic.c
ioapic.c
ioapic_common.c
lm32_pic.c
omap_intc.c
openpic.c
openpic_kvm.c
pl190.c
puv3_intc.c
realview_gic.c
s390_flic.c
s390_flic_kvm.c
sh_intc.c
slavio_intctl.c
vgic_common.h
xics.c
xics_kvm.c
xilinx_intc.c