qemu/target/i386/tcg
Paolo Bonzini ad003650d5 target/i386: use separate MMU indexes for 32-bit accesses
Accesses from a 32-bit environment (32-bit code segment for instruction
accesses, EFER.LMA==0 for processor accesses) have to mask away the
upper 32 bits of the address.  While a bit wasteful, the easiest way
to do so is to use separate MMU indexes.  These days, QEMU anyway is
compiled with a fixed value for NB_MMU_MODES.  Split MMU_USER_IDX,
MMU_KSMAP_IDX and MMU_KNOSMAP_IDX in two.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit 90f641531c)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
(Mjt: move changes for x86_cpu_mmu_index() to cpu_mmu_index() due to missing
 v8.2.0-1030-gace0c5fe5950 "target/i386: Populate CPUClass.mmu_index"
 Increase NB_MMU_MODES from 5 to 8 in target/i386/cpu-param.h due to missing
 v7.2.0-2640-gffd824f3f32d "include/exec: Set default NB_MMU_MODES to 16"
 v7.2.0-2647-g6787318a5d86 "target/i386: Remove NB_MMU_MODES define"
 which relaxed upper limit of MMU index for i386, since this commit starts
 using MMU_NESTED_IDX=7.
 Thanks Zhao Liu and Paolo Bonzini for the analisys and suggestions.
)
2024-04-09 20:06:31 +03:00
..
sysemu target/i386: use separate MMU indexes for 32-bit accesses 2024-04-09 20:06:31 +03:00
user target/i386: Raise #GP on unaligned m128 accesses when required. 2022-09-18 09:17:40 +02:00
bpt_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
cc_helper_template.h
cc_helper.c target/i386: Expand eflags updates inline 2022-11-01 08:31:41 +11:00
decode-new.c.inc target/i386: fix memory operand size for CVTPS2PD 2023-10-04 17:58:16 +03:00
decode-new.h target/i386: generalize operand size "ph" for use in CVTPS2PD 2023-10-04 17:58:16 +03:00
emit.c.inc target/i386: fix memory operand size for CVTPS2PD 2023-10-04 17:58:16 +03:00
excp_helper.c target/i386: Raise #GP on unaligned m128 accesses when required. 2022-09-18 09:17:40 +02:00
fpu_helper.c target/i386: introduce function to set rounding mode from FPCW or MXCSR bits 2022-10-20 15:16:13 +02:00
helper-tcg.h target/i386: Raise #GP on unaligned m128 accesses when required. 2022-09-18 09:17:40 +02:00
int_helper.c exec/exec-all: Move 'qemu/log.h' include in units requiring it 2022-02-21 10:18:06 +01:00
mem_helper.c exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
meson.build i386: split svm_helper into sysemu and stub-only user 2021-05-10 15:41:51 -04:00
misc_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
mpx_helper.c
seg_helper.c target/i386: Truncate values for lcall_real to i32 2022-10-11 09:36:01 +02:00
seg_helper.h i386: split seg_helper into user-only and sysemu parts 2021-05-10 15:41:52 -04:00
tcg-cpu.c target/i386: pcrel: store low bits of physical address in data[0] 2024-01-20 17:41:47 +03:00
tcg-cpu.h target/i386: Move X86XSaveArea into TCG 2021-07-06 08:33:51 +02:00
tcg-stub.c
translate.c target/i386: Generate an illegal opcode exception on cmp instructions with lock prefix 2024-02-20 18:44:40 +03:00