qemu/target-mips
Richard Henderson d73ee8a2b5 target-mips: Use TCG registers for the FPU.
With normal FP, this doesn't have much affect on the generated code,
because most of the FP operations are not CONST/PURE, and so we spill
registers in about the same frequency as the explicit load/stores.

But with Loongson multimedia instructions, which are all integral and
whose helpers are in fact CONST+PURE, this greatly improves the code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-28 14:54:25 +01:00
..
cpu-qom.h target-mips: QOM'ify CPU 2012-04-30 11:32:13 +02:00
cpu.c target-mips: Start QOM'ifying CPU init 2012-04-30 11:32:13 +02:00
cpu.h Rename target_phys_addr_t to hwaddr 2012-10-23 08:58:25 -05:00
helper.c Rename target_phys_addr_t to hwaddr 2012-10-23 08:58:25 -05:00
helper.h target-mips: rename helper flags 2012-10-28 14:54:24 +01:00
lmi_helper.c target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
mips-defs.h
op_helper.c Rename target_phys_addr_t to hwaddr 2012-10-23 08:58:25 -05:00
TODO Replace Qemu by QEMU in internal documentation 2012-04-07 13:58:25 +00:00
translate_init.c
translate.c target-mips: Use TCG registers for the FPU. 2012-10-28 14:54:25 +01:00