Richard Henderson 720923eddd target/arm: Remove arm_free_cc, a64_free_cc ... Translators are no longer required to free tcg temporaries. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2023-03-05 13:44:07 -08:00
..
alpha	target/alpha: Drop tcg_temp_free	2023-03-05 13:44:07 -08:00
arm	target/arm: Remove arm_free_cc, a64_free_cc	2023-03-05 13:44:07 -08:00
avr	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
cris	target/cris: Don't use tcg_temp_local_new	2023-03-01 07:33:28 -10:00
hexagon	target/hexagon/idef-parser: Drop gen_tmp_local	2023-03-01 07:33:28 -10:00
hppa	target/hppa: Don't use tcg_temp_local_new	2023-03-01 07:33:28 -10:00
i386	* bugfixes	2023-03-02 16:13:45 +00:00
loongarch	target/loongarch: Implement Chip Configuraiton Version Register(0x0000)	2023-03-03 09:37:30 +08:00
m68k	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
microblaze	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
mips	target/mips: Don't use tcg_temp_local_new	2023-03-01 07:33:28 -10:00
nios2	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
openrisc	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
ppc	accel/tcg: Remove translator_loop_temp_check	2023-03-05 13:44:07 -08:00
riscv	Fifth RISC-V PR for QEMU 8.0	2023-03-03 11:04:46 +00:00
rx	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
s390x	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
sh4	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
sparc	target/sparc: Use tlb_set_page_full	2023-03-05 13:44:07 -08:00
tricore	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	2023-03-01 07:33:27 -10:00
xtensa	target/xtensa: Don't use tcg_temp_local_new_*	2023-03-01 07:33:28 -10:00
Kconfig
meson.build