qemu/target
Philippe Mathieu-Daudé 71ed30b7d4 target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr
Per the manual '龙芯 GS264 处理器核用户手册' v1.0, chapter
1.1.5 SEGBITS: the 3A1000 (based on GS464 core) implements
48 virtual address bits in each 64-bit segment, not 40.

Fixes: af868995e1 ("target/mips: Add Loongson-3 CPU definition")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Message-Id: <20210813110149.1432692-3-f4bug@amsat.org>
2021-08-25 13:02:14 +02:00
..
alpha accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
arm target/arm: Add sve-default-vector-length cpu property 2021-07-27 10:57:40 +01:00
avr accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
cris accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
hexagon The Hexagon target was silently failing the SIGSEGV test because 2021-07-26 13:36:51 +01:00
hppa accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
i386 target/i386: Fixed size of constant for Windows 2021-08-13 14:31:49 +02:00
m68k accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
microblaze accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
mips target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr 2021-08-25 13:02:14 +02:00
nios2 target/nios2: Mark raise_exception() as noreturn 2021-07-30 08:23:12 -10:00
openrisc accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
ppc target/ppc: Ease L=0 requirement on cmp/cmpi/cmpl/cmpli for ppc32 2021-07-29 10:59:49 +10:00
riscv accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
rx accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
s390x accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
sh4 accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
sparc accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
tricore accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
xtensa accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00