qemu/tests/tcg/mips/mips32-dsp/insv.c
Petar Jovanovic 34f5606ee1 target-mips: Fix incorrect code and test for INSV
Content of register rs should be shifted for pos before applying a mask.
This change contains both fix for the instruction and to the existing test.

Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-12-06 08:10:50 +01:00

24 lines
383 B
C

#include<stdio.h>
#include<assert.h>
int main()
{
int rt, rs, dsp;
int result;
/* msb = 10, lsb = 5 */
dsp = 0x305;
rt = 0x12345678;
rs = 0x87654321;
result = 0x12345438;
__asm
("wrdsp %2, 0x03\n\t"
"insv %0, %1\n\t"
: "+r"(rt)
: "r"(rs), "r"(dsp)
);
assert(rt == result);
return 0;
}