Richard Henderson 36af59d062 target/ppc: Use tcg_gen_gvec_dup_imm ... We can now unify the implementation of the 3 VSPLTI instructions. Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2020-05-06 09:25:01 -07:00
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dfp-impl.inc.c	target/ppc: move FP and VMX registers into aligned vsr register array	2019-01-09 09:28:14 +11:00
dfp-ops.inc.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
fp-impl.inc.c	target/ppc: Fix typo in comments	2020-02-21 09:15:04 +11:00
fp-ops.inc.c	ppc: Add support for 'mffsce' instruction	2019-10-04 10:25:23 +10:00
spe-impl.inc.c	target/ppc: Use tcg_gen_abs_i32	2019-05-13 22:52:08 +00:00
spe-ops.inc.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
vmx-impl.inc.c	target/ppc: Use tcg_gen_gvec_dup_imm	2020-05-06 09:25:01 -07:00
vmx-ops.inc.c	Changes requirement for "vsubsbs" instruction	2018-12-21 09:29:12 +11:00
vsx-impl.inc.c	target/ppc: Use tcg_gen_gvec_dup_imm	2020-05-06 09:25:01 -07:00
vsx-ops.inc.c	target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro	2019-07-02 09:43:58 +10:00