4672cbd7be
Set the MachineClass flag ignore_memory_transaction_failures for almost all ARM boards. This means they retain the legacy behaviour that accesses to unimplemented addresses will RAZ/WI rather than aborting, when a subsequent commit adds support for external aborts. The exceptions are: * virt -- we know that guests won't try to prod devices that we don't describe in the device tree or ACPI tables * mps2 -- this board was written to use unimplemented-device for all the ranges with devices we don't yet handle New boards should not set the flag, but instead be written like the mps2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1504626814-23124-3-git-send-email-peter.maydell@linaro.org For the Xilinx boards: Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
52 lines
1.9 KiB
C
52 lines
1.9 KiB
C
/*
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* Netduino 2 Machine Model
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/boards.h"
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#include "qemu/error-report.h"
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#include "hw/arm/stm32f205_soc.h"
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#include "hw/arm/arm.h"
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static void netduino2_init(MachineState *machine)
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{
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DeviceState *dev;
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dev = qdev_create(NULL, TYPE_STM32F205_SOC);
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qdev_prop_set_string(dev, "cpu-model", "cortex-m3");
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object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal);
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armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
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FLASH_SIZE);
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}
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static void netduino2_machine_init(MachineClass *mc)
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{
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mc->desc = "Netduino 2 Machine";
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mc->init = netduino2_init;
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mc->ignore_memory_transaction_failures = true;
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}
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DEFINE_MACHINE("netduino2", netduino2_machine_init)
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