70eb9f9cd1
This is an effort to clean up the hw/riscv directory. Ideally it should only contain the RISC-V SoC / machine codes plus generic codes. Let's move riscv_htif model to hw/char directory. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1599129623-68957-8-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
73 lines
1.2 KiB
Plaintext
73 lines
1.2 KiB
Plaintext
config HART
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bool
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config IBEX
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bool
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config SIFIVE
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bool
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select MSI_NONBROKEN
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config SIFIVE_E
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bool
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select HART
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select SIFIVE
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select SIFIVE_CLINT
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select SIFIVE_GPIO
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select SIFIVE_PLIC
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select SIFIVE_E_PRCI
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select UNIMP
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config SIFIVE_U
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bool
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select CADENCE
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select HART
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select SIFIVE
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select SIFIVE_CLINT
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select SIFIVE_GPIO
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select SIFIVE_PDMA
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select SIFIVE_PLIC
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select SIFIVE_U_OTP
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select SIFIVE_U_PRCI
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select UNIMP
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config SPIKE
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bool
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select HART
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select HTIF
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select SIFIVE
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select SIFIVE_CLINT
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select SIFIVE_PLIC
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config OPENTITAN
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bool
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select IBEX
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select HART
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select UNIMP
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config RISCV_VIRT
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bool
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imply PCI_DEVICES
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imply TEST_DEVICES
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select PCI
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select HART
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select SERIAL
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select GOLDFISH_RTC
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select VIRTIO_MMIO
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select PCI_EXPRESS_GENERIC_BRIDGE
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select PFLASH_CFI01
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select SIFIVE
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select SIFIVE_CLINT
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select SIFIVE_PLIC
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config MICROCHIP_PFSOC
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bool
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select HART
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select SIFIVE
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select SIFIVE_CLINT
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select UNIMP
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select MCHP_PFSOC_MMUART
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select SIFIVE_PDMA
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select SIFIVE_PLIC
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select CADENCE_SDHCI
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