qemu/target/riscv/insn_trans
Yang Liu a3ab69f9f6 target/riscv: rvv-1.0: vf[w]redsum distinguish between ordered/unordered
Starting with RVV1.0, the original vf[w]redsum_vs instruction was renamed
to vf[w]redusum_vs. The distinction between ordered and unordered is also
more consistent with other instructions, although there is no difference
in implementation between the two for QEMU.

Signed-off-by: Yang Liu <liuyang22@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Message-Id: <20220817074802.20765-2-liuyang22@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-09-27 11:23:57 +10:00
..
trans_privileged.c.inc
trans_rva.c.inc
trans_rvb.c.inc
trans_rvd.c.inc
trans_rvf.c.inc
trans_rvh.c.inc
trans_rvi.c.inc
trans_rvk.c.inc
trans_rvm.c.inc
trans_rvv.c.inc
trans_rvzfh.c.inc
trans_svinval.c.inc
trans_xventanacondops.c.inc