8bded2e73e
The XT check for the lxvx/stxvx instructions is currently
inverted. This was introduced during the move to decodetree.
>From the ISA:
Chapter 7. Vector-Scalar Extension Facility
Load VSX Vector Indexed X-form
lxvx XT,RA,RB
if TX=0 & MSR.VSX=0 then VSX_Unavailable()
if TX=1 & MSR.VEC=0 then Vector_Unavailable()
...
Let XT be the value 32×TX + T.
The code currently does the opposite:
if (paired || a->rt >= 32) {
REQUIRE_VSX(ctx);
} else {
REQUIRE_VECTOR(ctx);
}
This was already fixed for lxv/stxv at commit "2cc0e449d1 (target/ppc:
Fix lxv/stxv MSR facility check)", but the indexed forms were missed.
Cc: qemu-stable@nongnu.org
Fixes:
|
||
|---|---|---|
| .. | ||
| bhrb-impl.c.inc | ||
| branch-impl.c.inc | ||
| dfp-impl.c.inc | ||
| fixedpoint-impl.c.inc | ||
| fp-impl.c.inc | ||
| fp-ops.c.inc | ||
| misc-impl.c.inc | ||
| processor-ctrl-impl.c.inc | ||
| spe-impl.c.inc | ||
| spe-ops.c.inc | ||
| storage-ctrl-impl.c.inc | ||
| vmx-impl.c.inc | ||
| vmx-ops.c.inc | ||
| vsx-impl.c.inc | ||
| vsx-ops.c.inc | ||