5341bf6afe
Added functions for cloning CPU registers and resetting the CPU state for RISC-V architecture. Signed-off-by: Mark Corbin <mark@dibsco.co.uk> Signed-off-by: Ajeet Singh <itachis@FreeBSD.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240916155119.14610-4-itachis@FreeBSD.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
149 lines
4.5 KiB
C
149 lines
4.5 KiB
C
/*
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* RISC-V CPU init and loop
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*
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* Copyright (c) 2019 Mark Corbin
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_ARCH_CPU_H
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#define TARGET_ARCH_CPU_H
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#include "target_arch.h"
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#include "signal-common.h"
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#define TARGET_DEFAULT_CPU_MODEL "max"
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static inline void target_cpu_init(CPURISCVState *env,
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struct target_pt_regs *regs)
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{
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int i;
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for (i = 1; i < 32; i++) {
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env->gpr[i] = regs->regs[i];
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}
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env->pc = regs->sepc;
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}
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static inline void target_cpu_loop(CPURISCVState *env)
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{
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CPUState *cs = env_cpu(env);
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int trapnr;
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abi_long ret;
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unsigned int syscall_num;
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int32_t signo, code;
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for (;;) {
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cpu_exec_start(cs);
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trapnr = cpu_exec(cs);
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cpu_exec_end(cs);
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process_queued_cpu_work(cs);
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signo = 0;
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switch (trapnr) {
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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case EXCP_ATOMIC:
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cpu_exec_step_atomic(cs);
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break;
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case RISCV_EXCP_U_ECALL:
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syscall_num = env->gpr[xT0];
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env->pc += TARGET_INSN_SIZE;
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/* Compare to cpu_fetch_syscall_args() in riscv/riscv/trap.c */
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if (TARGET_FREEBSD_NR___syscall == syscall_num ||
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TARGET_FREEBSD_NR_syscall == syscall_num) {
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ret = do_freebsd_syscall(env,
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env->gpr[xA0],
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env->gpr[xA1],
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env->gpr[xA2],
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env->gpr[xA3],
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env->gpr[xA4],
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env->gpr[xA5],
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env->gpr[xA6],
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env->gpr[xA7],
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0);
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} else {
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ret = do_freebsd_syscall(env,
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syscall_num,
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env->gpr[xA0],
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env->gpr[xA1],
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env->gpr[xA2],
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env->gpr[xA3],
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env->gpr[xA4],
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env->gpr[xA5],
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env->gpr[xA6],
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env->gpr[xA7]
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);
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}
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/*
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* Compare to cpu_set_syscall_retval() in
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* riscv/riscv/vm_machdep.c
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*/
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if (ret >= 0) {
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env->gpr[xA0] = ret;
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env->gpr[xT0] = 0;
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} else if (ret == -TARGET_ERESTART) {
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env->pc -= TARGET_INSN_SIZE;
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} else if (ret != -TARGET_EJUSTRETURN) {
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env->gpr[xA0] = -ret;
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env->gpr[xT0] = 1;
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}
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break;
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case RISCV_EXCP_ILLEGAL_INST:
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signo = TARGET_SIGILL;
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code = TARGET_ILL_ILLOPC;
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break;
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case RISCV_EXCP_BREAKPOINT:
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signo = TARGET_SIGTRAP;
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code = TARGET_TRAP_BRKPT;
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break;
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case EXCP_DEBUG:
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signo = TARGET_SIGTRAP;
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code = TARGET_TRAP_BRKPT;
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break;
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default:
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fprintf(stderr, "qemu: unhandled CPU exception "
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"0x%x - aborting\n", trapnr);
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cpu_dump_state(cs, stderr, 0);
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abort();
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}
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if (signo) {
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force_sig_fault(signo, code, env->pc);
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}
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process_pending_signals(env);
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}
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}
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static inline void target_cpu_clone_regs(CPURISCVState *env, target_ulong newsp)
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{
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if (newsp) {
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env->gpr[xSP] = newsp;
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}
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env->gpr[xA0] = 0;
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env->gpr[xT0] = 0;
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}
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static inline void target_cpu_reset(CPUArchState *env)
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{
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}
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#endif /* TARGET_ARCH_CPU_H */
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