qemu/target/ppc/translate
Matthieu Bucchianeri 6d592c557e target/ppc: Fix TCG leak with the evmwsmiaa instruction
Fix double-call to tcg_temp_new_i64(), where a temp is allocated both at
declaration time and further down the implementation of gen_evmwsmiaa().

Note that gen_evmwsmia() and gen_evmwsmiaa() are still not implemented
correctly, as they invoke gen_evmwsmi() which may return early, but the
return is not propagated. This will be fixed in my patch for bug #1888918.

Signed-off-by: Matthieu Bucchianeri <matthieu.bucchianeri@leostella.com>
Message-Id: <20200727172114.31415-1-matthieu.bucchianeri@leostella.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2020-08-12 13:16:27 +10:00
..
dfp-impl.inc.c target/ppc: move FP and VMX registers into aligned vsr register array 2019-01-09 09:28:14 +11:00
dfp-ops.inc.c
fp-impl.inc.c target/ppc: Fix typo in comments 2020-02-21 09:15:04 +11:00
fp-ops.inc.c ppc: Add support for 'mffsce' instruction 2019-10-04 10:25:23 +10:00
spe-impl.inc.c target/ppc: Fix TCG leak with the evmwsmiaa instruction 2020-08-12 13:16:27 +10:00
spe-ops.inc.c
vmx-impl.inc.c target/ppc: Use tcg_gen_gvec_rotlv 2020-06-02 08:42:37 -07:00
vmx-ops.inc.c Changes requirement for "vsubsbs" instruction 2018-12-21 09:29:12 +11:00
vsx-impl.inc.c target/ppc: Use tcg_gen_gvec_dup_imm 2020-05-06 09:25:01 -07:00
vsx-ops.inc.c target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro 2019-07-02 09:43:58 +10:00