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Peter Maydell d8ae530ec0 MIPS patches queue 
- minor simplifications in PREF / JR opcodes
 - merge 32-bit/64-bit Release6 decodetree definitions
 - converted NEC Vr54xx extension opcodes to decodetree
 - housekeeping in gen_helper() macros
 - replace TARGET_WORDS_BIGENDIAN #ifdef'ry by cpu_is_bigendian()
 - allow Loongson 3A1000 to use up to 48-bit VAddr
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmEmI78ACgkQ4+MsLN6t
 wN4RLw/+PIBVfaDvASnFa2f9b4SGQ2WiM0LuLh/sN6ieMiFccqJZPq2Dz5GCQsR7
 7v2+MZ9gcAoWH/NCft+vbXGwiP9exoChb8c65Gm0GdpQ3sKPYXJJAi/D0vjuPMGe
 Yk8DrfERavu4bcpXPaC+B3p8krii88W+vEYvmvWfirD+gWxjF/HviLzHQK/62YMK
 N695BYVav5Fd3fjqn3p7Kw/WdP++NS757G53dSF/r5l1wFEGFZAuYW7R2rWDQsz+
 yWvPUkIFoJ9OXitKw01FVaDNXF3a1efMhZjFvCr0EU0eF4qsxAywXomC4CDpAo+Y
 s15aNZoxWM4D0eEoNLm874QAgNu9txPJPg5kuZVpBDwdTKWMrShj5+m/QlWqVRcA
 mj7Ff2/B50mmB8aGfkQm82DpnqNXk9Vr1Y4hGzKrSOc1NGZItnpX2XJfqymEF7M9
 9SW73jF6X2871FyiRvd5cO9TGlBieMNMlkenuxiyQNvIgocw1FX606EDji/aFp2e
 KehjWw/2JCmBC1uUhaYqks4db7B8MSeVl8G3Dwx3lxnuz4xson/yscAxengZBR2r
 clubyAoEa7+6sc2DhflLGlWfQpiOBDW4FFCW37H7KhVnJXFTomuiMBSSBc+njLMi
 NDT7wAMCyMXtmZtx3zeWZpppqdc3doaGm3Bq6HDWEkiYaOe6TxA=
 =ceCP
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/philmd/tags/mips-20210825' into staging

MIPS patches queue

- minor simplifications in PREF / JR opcodes
- merge 32-bit/64-bit Release6 decodetree definitions
- converted NEC Vr54xx extension opcodes to decodetree
- housekeeping in gen_helper() macros
- replace TARGET_WORDS_BIGENDIAN #ifdef'ry by cpu_is_bigendian()
- allow Loongson 3A1000 to use up to 48-bit VAddr

# gpg: Signature made Wed 25 Aug 2021 12:04:31 BST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20210825: (28 commits)
  target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian()
  target/mips: Store CP0_Config0 in DisasContext
  target/mips: Replace GET_LMASK64() macro by get_lmask(64) function
  target/mips: Replace GET_LMASK() macro by get_lmask(32) function
  target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpers
  target/mips: Define gen_helper() macros in translate.h
  target/mips: Use tcg_constant_i32() in generate_exception_err()
  target/mips: Inline gen_helper_0e0i()
  target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros
  target/mips: Simplify gen_helper() macros by using tcg_constant_i32()
  target/mips: Use tcg_constant_i32() in gen_helper_0e2i()
  target/mips: Remove gen_helper_1e2i()
  target/mips: Remove gen_helper_0e3i()
  target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXT
  target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr
  target/mips: Document Loongson-3A CPU definitions
  target/mips: Convert Vr54xx MSA* opcodes to decodetree
  target/mips: Convert Vr54xx MUL* opcodes to decodetree
  target/mips: Convert Vr54xx MACC* opcodes to decodetree
  target/mips: Introduce decodetree structure for NEC Vr54xx extension
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-08-25 21:09:48 +01:00
..
alpha accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
arm target/arm: kvm: use RCU_READ_LOCK_GUARD() in kvm_arch_fixup_msi_route() 2021-08-25 10:48:50 +01:00
avr accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
cris accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
hexagon The Hexagon target was silently failing the SIGSEGV test because 2021-07-26 13:36:51 +01:00
hppa accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
i386 target/i386: Fixed size of constant for Windows 2021-08-13 14:31:49 +02:00
m68k accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
microblaze accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
mips target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian() 2021-08-25 13:02:14 +02:00
nios2 target/nios2: Mark raise_exception() as noreturn 2021-07-30 08:23:12 -10:00
openrisc accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
ppc target/ppc: Ease L=0 requirement on cmp/cmpi/cmpl/cmpli for ppc32 2021-07-29 10:59:49 +10:00
riscv accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
rx accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
s390x accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
sh4 accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
sparc accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
tricore accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
xtensa accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00