79e73b5df0
clang version 18.1.6 assumes a register is 64-bit by default and complains if a 32-bit value is given. Explicitly specify register width when passing a 32-bit value. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240627-tcg-v2-3-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-5-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-10-alex.bennee@linaro.org>
63 lines
1.4 KiB
C
63 lines
1.4 KiB
C
/*
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* Branch target identification, basic notskip cases.
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*/
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#include "bti-crt.c.inc"
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static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc)
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{
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uc->uc_mcontext.pc += 8;
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uc->uc_mcontext.pstate = 1;
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}
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#define NOP "nop"
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#define BTI_N "hint #32"
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#define BTI_C "hint #34"
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#define BTI_J "hint #36"
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#define BTI_JC "hint #38"
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#define BTYPE_1(DEST) \
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asm("mov %w0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %w0,#0" \
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: "=r"(skipped) : : "x16")
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#define BTYPE_2(DEST) \
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asm("mov %w0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %w0,#0" \
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: "=r"(skipped) : : "x16", "x30")
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#define BTYPE_3(DEST) \
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asm("mov %w0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %w0,#0" \
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: "=r"(skipped) : : "x15")
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#define TEST(WHICH, DEST, EXPECT) \
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do { WHICH(DEST); fail += skipped ^ EXPECT; } while (0)
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int main()
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{
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int fail = 0;
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int skipped;
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/* Signal-like with SA_SIGINFO. */
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signal_info(SIGILL, skip2_sigill);
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TEST(BTYPE_1, NOP, 1);
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TEST(BTYPE_1, BTI_N, 1);
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TEST(BTYPE_1, BTI_C, 0);
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TEST(BTYPE_1, BTI_J, 0);
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TEST(BTYPE_1, BTI_JC, 0);
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TEST(BTYPE_2, NOP, 1);
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TEST(BTYPE_2, BTI_N, 1);
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TEST(BTYPE_2, BTI_C, 0);
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TEST(BTYPE_2, BTI_J, 1);
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TEST(BTYPE_2, BTI_JC, 0);
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TEST(BTYPE_3, NOP, 1);
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TEST(BTYPE_3, BTI_N, 1);
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TEST(BTYPE_3, BTI_C, 1);
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TEST(BTYPE_3, BTI_J, 0);
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TEST(BTYPE_3, BTI_JC, 0);
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return fail;
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}
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