mirror of https://gitlab.com/qemu-project/qemu
27d6dea3d7
The NRF51 series SoC have 3 timer peripherals, each having 4 counters. To help differentiate which peripheral is accessed, display the timer ID in the trace events. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200504072822.18799-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| .. | ||
| a9gtimer.h | ||
| allwinner-a10-pit.h | ||
| arm_mptimer.h | ||
| armv7m_systick.h | ||
| aspeed_timer.h | ||
| bcm2835_systmr.h | ||
| cmsdk-apb-dualtimer.h | ||
| cmsdk-apb-timer.h | ||
| digic-timer.h | ||
| hpet.h | ||
| i8254.h | ||
| i8254_internal.h | ||
| imx_epit.h | ||
| imx_gpt.h | ||
| mips_gictimer.h | ||
| mss-timer.h | ||
| nrf51_timer.h | ||
| stm32f2xx_timer.h | ||