Fredrik Noring a95c4c26f1 target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions ... The three-operand MADD and MADDU are specific to R5900 cores. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Fredrik Noring <noring@nocrew.org>		2019-01-03 17:52:52 +01:00
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alpha	vmstate: constify VMStateField	2018-11-27 15:35:15 +01:00
arm	miscellaneous patches:	2018-12-16 16:32:43 +00:00
cris
hppa	vmstate: constify VMStateField	2018-11-27 15:35:15 +01:00
i386	Clean up includes	2018-12-20 10:29:08 +01:00
lm32
m68k
microblaze
mips	target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions	2019-01-03 17:52:52 +01:00
moxie
nios2
openrisc	vmstate: constify VMStateField	2018-11-27 15:35:15 +01:00
ppc	Changes requirement for "vsubsbs" instruction	2018-12-21 09:29:12 +11:00
riscv	Clean up includes	2018-12-20 10:29:08 +01:00
s390x
sh4
sparc	vmstate: constify VMStateField	2018-11-27 15:35:15 +01:00
tilegx
tricore	target/tricore: use float32_is_denormal	2018-12-17 08:25:25 +00:00
unicore32
xtensa	target/xtensa: drop num_[core_]regs from dc232b/dc233c configs	2018-11-20 12:20:41 -08:00