6a98e614e5
The fby35 machine is not implemented in hw/arm/aspeed.c, but its documentation is currently stuck at the end of aspeed.rst, formatted in a way that it gets its own heading in the top-level list of boards in target-arm.html. We don't have any other boards that we document like this; split it out into its own rst file. This improves consistency with other board docs and means we can have the entry in the target-arm list be in the correct alphabetical order. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-id: 20241018141332.942844-4-peter.maydell@linaro.org
260 lines
8.8 KiB
ReStructuredText
260 lines
8.8 KiB
ReStructuredText
Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``)
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========================================================================================================================================================================================================================================================================================================================================================================================================
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The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
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Aspeed evaluation boards. They are based on different releases of the
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Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
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AST2500 with an ARM1176JZS CPU (800MHz), the AST2600
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with dual cores ARM Cortex-A7 CPUs (1.2GHz) and more recently the AST2700
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with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz)
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The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
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etc.
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AST2400 SoC based machines :
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- ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
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- ``quanta-q71l-bmc`` OpenBMC Quanta BMC
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- ``supermicrox11-bmc`` Supermicro X11 BMC
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AST2500 SoC based machines :
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- ``ast2500-evb`` Aspeed AST2500 Evaluation board
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- ``romulus-bmc`` OpenPOWER Romulus POWER9 BMC
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- ``witherspoon-bmc`` OpenPOWER Witherspoon POWER9 BMC
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- ``sonorapass-bmc`` OCP SonoraPass BMC
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- ``fp5280g2-bmc`` Inspur FP5280G2 BMC
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- ``g220a-bmc`` Bytedance G220A BMC
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- ``yosemitev2-bmc`` Facebook YosemiteV2 BMC
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- ``tiogapass-bmc`` Facebook Tiogapass BMC
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AST2600 SoC based machines :
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- ``ast2600-evb`` Aspeed AST2600 Evaluation board (Cortex-A7)
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- ``tacoma-bmc`` OpenPOWER Witherspoon POWER9 AST2600 BMC
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- ``rainier-bmc`` IBM Rainier POWER10 BMC
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- ``fuji-bmc`` Facebook Fuji BMC
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- ``bletchley-bmc`` Facebook Bletchley BMC
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- ``fby35-bmc`` Facebook fby35 BMC
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- ``qcom-dc-scm-v1-bmc`` Qualcomm DC-SCM V1 BMC
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- ``qcom-firework-bmc`` Qualcomm Firework BMC
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AST2700 SoC based machines :
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- ``ast2700-evb`` Aspeed AST2700 Evaluation board (Cortex-A35)
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Supported devices
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-----------------
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* SMP (for the AST2600 Cortex-A7)
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* Interrupt Controller (VIC)
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* Timer Controller
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* RTC Controller
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* I2C Controller, including the new register interface of the AST2600
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* System Control Unit (SCU)
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* SRAM mapping
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* X-DMA Controller (basic interface)
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* Static Memory Controller (SMC or FMC) - Only SPI Flash support
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* SPI Memory Controller
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* USB 2.0 Controller
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* SD/MMC storage controllers
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* SDRAM controller (dummy interface for basic settings and training)
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* Watchdog Controller
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* GPIO Controller (Master only)
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* UART
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* Ethernet controllers
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* Front LEDs (PCA9552 on I2C bus)
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* LPC Peripheral Controller (a subset of subdevices are supported)
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* Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
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* ADC
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* Secure Boot Controller (AST2600)
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* eMMC Boot Controller (dummy)
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* PECI Controller (minimal)
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* I3C Controller
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* Internal Bridge Controller (SLI dummy)
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Missing devices
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---------------
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* Coprocessor support
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* PWM and Fan Controller
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* Slave GPIO Controller
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* Super I/O Controller
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* PCI-Express 1 Controller
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* Graphic Display Controller
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* MCTP Controller
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* Mailbox Controller
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* Virtual UART
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* eSPI Controller
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Boot options
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------------
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The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options
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to load a Linux kernel or from a firmware. Images can be downloaded from the
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OpenBMC jenkins :
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https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/
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or directly from the OpenBMC GitHub release repository :
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https://github.com/openbmc/openbmc/releases
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or directly from the ASPEED Forked OpenBMC GitHub release repository :
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https://github.com/AspeedTech-BMC/openbmc/releases
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To boot a kernel directly from a Linux build tree:
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.. code-block:: bash
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$ qemu-system-arm -M ast2600-evb -nographic \
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-kernel arch/arm/boot/zImage \
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-dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \
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-initrd rootfs.cpio
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To boot the machine from the flash image, use an MTD drive :
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.. code-block:: bash
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$ qemu-system-arm -M romulus-bmc -nic user \
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-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
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Options specific to Aspeed machines are :
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* ``boot-emmc`` to set or unset boot from eMMC (AST2600).
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* ``execute-in-place`` which emulates the boot from the CE0 flash
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device by using the FMC controller to load the instructions, and
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not simply from RAM. This takes a little longer.
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* ``fmc-model`` to change the default FMC Flash model. FW needs
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support for the chip model to boot.
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* ``spi-model`` to change the default SPI Flash model.
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* ``bmc-console`` to change the default console device. Most of the
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machines use the ``UART5`` device for a boot console, which is
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mapped on ``/dev/ttyS4`` under Linux, but it is not always the
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case.
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To use other flash models, for instance a different FMC chip and a
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bigger (64M) SPI for the ``ast2500-evb`` machine, run :
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.. code-block:: bash
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-M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
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When more flexibility is needed to define the flash devices, to use
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different flash models or define all flash devices (up to 8), the
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``-nodefaults`` QEMU option can be used to avoid creating the default
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flash devices.
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Flash devices should then be created from the command line and attached
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to a block device :
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.. code-block:: bash
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$ qemu-system-arm -M ast2600-evb \
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-blockdev node-name=fmc0,driver=file,filename=/path/to/fmc0.img \
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-device mx66u51235f,bus=ssi.0,cs=0x0,drive=fmc0 \
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-blockdev node-name=fmc1,driver=file,filename=/path/to/fmc1.img \
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-device mx66u51235f,bus=ssi.0,cs=0x1,drive=fmc1 \
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-blockdev node-name=spi1,driver=file,filename=/path/to/spi1.img \
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-device mx66u51235f,cs=0x0,bus=ssi.1,drive=spi1 \
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-nographic -nodefaults
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In that case, the machine boots fetching instructions from the FMC0
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device. It is slower to start but closer to what HW does. Using the
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machine option ``execute-in-place`` has a similar effect.
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To change the boot console and use device ``UART3`` (``/dev/ttyS2``
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under Linux), use :
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.. code-block:: bash
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-M ast2500-evb,bmc-console=uart3
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Boot the AST2700 machine from the flash image, use an MTD drive :
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.. code-block:: bash
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IMGDIR=ast2700-default
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UBOOT_SIZE=$(stat --format=%s -L ${IMGDIR}/u-boot-nodtb.bin)
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$ qemu-system-aarch64 -M ast2700-evb \
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-device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot-nodtb.bin \
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-device loader,force-raw=on,addr=$((0x400000000 + ${UBOOT_SIZE})),file=${IMGDIR}/u-boot.dtb \
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-device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \
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-device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/optee/tee-raw.bin \
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-device loader,cpu-num=0,addr=0x430000000 \
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-device loader,cpu-num=1,addr=0x430000000 \
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-device loader,cpu-num=2,addr=0x430000000 \
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-device loader,cpu-num=3,addr=0x430000000 \
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-smp 4 \
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-drive file=${IMGDIR}/image-bmc,format=raw,if=mtd \
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-nographic
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Aspeed minibmc family boards (``ast1030-evb``)
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==================================================================
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The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation
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boards. They are based on different releases of the
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Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
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The SoC comes with SRAM, SPI, I2C, etc.
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AST1030 SoC based machines :
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- ``ast1030-evb`` Aspeed AST1030 Evaluation board (Cortex-M4F)
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Supported devices
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-----------------
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* SMP (for the AST1030 Cortex-M4F)
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* Interrupt Controller (VIC)
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* Timer Controller
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* I2C Controller
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* System Control Unit (SCU)
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* SRAM mapping
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* Static Memory Controller (SMC or FMC) - Only SPI Flash support
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* SPI Memory Controller
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* USB 2.0 Controller
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* Watchdog Controller
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* GPIO Controller (Master only)
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* UART
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* LPC Peripheral Controller (a subset of subdevices are supported)
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* Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
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* ADC
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* Secure Boot Controller
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* PECI Controller (minimal)
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Missing devices
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---------------
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* PWM and Fan Controller
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* Slave GPIO Controller
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* Mailbox Controller
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* Virtual UART
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* eSPI Controller
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* I3C Controller
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Boot options
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------------
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The Aspeed machines can be started using the ``-kernel`` to load a
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Zephyr OS or from a firmware. Images can be downloaded from the
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ASPEED GitHub release repository :
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https://github.com/AspeedTech-BMC/zephyr/releases
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To boot a kernel directly from a Zephyr build tree:
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.. code-block:: bash
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$ qemu-system-arm -M ast1030-evb -nographic \
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-kernel zephyr.elf
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