qemu/target/avr
Richard Henderson 597f9b2d30 accel/tcg: Pass max_insn to gen_intermediate_code by pointer
In preparation for returning the number of insns generated
via the same pointer.  Adjust only the prototypes so far.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-01 07:33:27 -10:00
..
cpu-param.h
cpu-qom.h target/avr: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/avr: Replace tb_pc() with tb->pc 2023-03-01 07:33:24 -10:00
cpu.h cleanup: Tweak and re-run return_directly.cocci 2022-12-14 16:19:35 +01:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
gdbstub.c target/avr: Implement gdb_adjust_breakpoint 2021-07-21 07:47:05 -10:00
helper.c target/avr: Disable interrupts when env->skip set 2022-09-01 06:42:21 +01:00
helper.h target/avr: Mark some helpers noreturn 2021-07-09 09:42:28 -07:00
insn.decode target/avr: Add instruction translation - MCU Control Instructions 2020-07-11 11:02:05 +02:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c cpu: Move AVR target vmsd field from CPUClass to DeviceClass 2021-05-26 15:33:59 -07:00
meson.build meson: target 2020-08-21 06:30:35 -04:00
translate.c accel/tcg: Pass max_insn to gen_intermediate_code by pointer 2023-03-01 07:33:27 -10:00