qemu/target
Daniel Henrique Barboza 68c9e54bea target/riscv: do not enable all named features by default
Commit 3b8022269c added the capability of named features/profile
extensions to be added in riscv,isa. To do that we had to assign priv
versions for each one of them in isa_edata_arr[]. But this resulted in a
side-effect: vendor CPUs that aren't running priv_version_latest started
to experience warnings for these profile extensions [1]:

  | $ qemu-system-riscv32  -M sifive_e
  | qemu-system-riscv32: warning: disabling zic64b extension for hart
0x00000000 because privilege spec version does not match
  | qemu-system-riscv32: warning: disabling ziccamoa extension for
hart 0x00000000 because privilege spec version does not match

This is benign as far as the CPU behavior is concerned since disabling
both extensions is a no-op (aside from riscv,isa). But the warnings are
unpleasant to deal with, especially because we're sending user warnings
for extensions that users can't enable/disable.

Instead of enabling all named features all the time, separate them by
priv version. During finalize() time, after we decided which
priv_version the CPU is running, enable/disable all the named extensions
based on the priv spec chosen. This will be enough for a bug fix, but as
a future work we should look into how we can name these extensions in a
way that we don't need an explicit ext_name => priv_ver as we're doing
here.

The named extensions being added in isa_edata_arr[] that will be
enabled/disabled based solely on priv version can be removed from
riscv_cpu_named_features[]. 'zic64b' is an extension that can be
disabled based on block sizes so it'll retain its own flag and entry.

[1] https://lists.gnu.org/archive/html/qemu-devel/2024-03/msg02592.html

Reported-by: Clément Chigot <chigot@adacore.com>
Fixes: 3b8022269c ("target/riscv: add riscv,isa to named features")
Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Tested-by: Clément Chigot <chigot@adacore.com>
Message-ID: <20240312203214.350980-1-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-03-22 15:10:45 +10:00
..
alpha target/alpha: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 11:46:16 +01:00
arm Error reporting patches for 2024-03-12 2024-03-12 16:55:56 +00:00
avr target/avr: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 11:46:17 +01:00
cris target/cris: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 11:46:17 +01:00
hexagon target/hexagon: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 11:46:17 +01:00
hppa target/hppa: fix do_stdby_e() 2024-03-19 14:08:02 -10:00
i386 target/i386: Revert monitor_puts() in do_inject_x86_mce() 2024-03-20 09:47:00 +01:00
loongarch target/loongarch: Fix qemu-loongarch64 hang when executing 'll.d $t0, $t0, 0' 2024-03-20 10:20:08 +08:00
m68k target/m68k: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
microblaze target/microblaze: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
mips target/mips: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
nios2 target/nios2: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
openrisc target/openrisc: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
ppc * PAPR nested hypervisor host implementation for spapr TCG 2024-03-13 12:37:27 +00:00
riscv target/riscv: do not enable all named features by default 2024-03-22 15:10:45 +10:00
rx target/rx: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
s390x target/s390x: improve cpu compatibility check error message 2024-03-18 17:00:37 +01:00
sh4 target/sh4: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:24 +01:00
sparc target/sparc/cpu: Improve the CPU help text 2024-03-18 17:11:19 +01:00
tricore target/tricore: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:25 +01:00
xtensa target/xtensa: Prefer fast cpu_env() over slower CPU QOM cast macro 2024-03-12 12:04:25 +01:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00
target-common.c target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00