Paolo Bonzini 687758565a target/i386: svm: do not discard high 32 bits of EXITINFO1 ... env->error_code is only 32-bits wide, so the high 32 bits of EXITINFO1 are being lost. However, even though saving guest state and restoring host state must be delayed to do_vmexit, because they might take tb_lock, it is always possible to write to the VMCB. So do this for the exit code and EXITINFO1, just like it is already being done for EXITINFO2. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2021-03-19 08:48:18 -04:00
..
alpha	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	2021-02-05 10:24:15 -10:00
arm	hw/arm/virt: KVM: The IPA lower bound is 32	2021-03-12 12:47:11 +00:00
avr	target/avr: Fix interrupt execution	2021-03-15 00:39:52 +01:00
cris	target/cris: Plug leakage of TCG temporaries	2021-02-22 09:04:58 +01:00
hexagon	target/hexagon/gen_tcg_funcs: Fix a typo	2021-03-09 21:31:34 +01:00
hppa	exec: Use cpu_untagged_addr in g2h; split out g2h_untagged	2021-02-16 11:04:53 +00:00
i386	target/i386: svm: do not discard high 32 bits of EXITINFO1	2021-03-19 08:48:18 -04:00
lm32	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
m68k	Prepare MacOS ROM support:	2021-03-12 18:56:56 +00:00
microblaze	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	2021-02-05 10:24:15 -10:00
mips	target/mips/tx79: Salvage instructions description comment	2021-03-13 23:43:30 +01:00
moxie	exec: Move TranslationBlock typedef to qemu/typedefs.h	2021-02-18 08:19:08 +00:00
nios2	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
openrisc	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	2021-02-05 10:24:15 -10:00
ppc	ppc patch queue for 2021-03-10	2021-03-12 11:30:55 +00:00
riscv	Pull request	2021-03-11 18:55:27 +00:00
rx	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	2021-02-05 10:24:15 -10:00
s390x	target/s390x: Store r1/r2 for page-translation exceptions during MVPG	2021-03-15 11:03:20 +01:00
sh4	target/sh4: Remove unused definitions	2021-03-06 16:18:42 +01:00
sparc	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	2021-02-05 10:24:15 -10:00
tricore	target/tricore: Fix OPC2_32_RRPW_EXTR for width=0	2021-03-14 14:49:01 +01:00
unicore32	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
xtensa	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
meson.build	Remove deprecated target tilegx	2021-03-09 11:26:32 +01:00