Wen, Jianxian 77844cc51a hw/dma/pl330: Add memory region to replace default ...

Add property memory region which can connect with IOMMU region to support SMMU translate.

Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 4C23C17B8E87E74E906A25A3254A03F4FA1FEC31@SHASXM03.verisilicon.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2021-08-25 10:48:50 +01:00

..

bcm2835_dma.c

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etraxfs_dma.c

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i8257.c

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i82374.c

Use OBJECT_DECLARE_SIMPLE_TYPE when possible

2020-09-18 14:12:32 -04:00

Kconfig

hw/dma: Implement a Xilinx CSU DMA model

2021-03-08 17:20:04 +00:00

meson.build

Drop the deprecated unicore32 target

2021-05-12 18:20:52 +02:00

omap_dma.c

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pl080.c

Do not include exec/address-spaces.h if it's not really necessary

2021-05-02 17:24:51 +02:00

pl330.c

hw/dma/pl330: Add memory region to replace default

2021-08-25 10:48:50 +01:00

pxa2xx_dma.c

hw/arm: Constify VMStateDescription

2021-05-02 17:24:50 +02:00

rc4030.c

Use OBJECT_DECLARE_SIMPLE_TYPE when possible

2020-09-18 14:12:32 -04:00

sifive_pdma.c

hw: Remove superfluous includes of hw/hw.h

2021-05-02 17:24:50 +02:00

soc_dma.c

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sparc32_dma.c

esp: rename existing ESP QOM type to SYSBUS_ESP

2021-03-07 10:39:05 +00:00

trace-events

docs: fix references to docs/devel/tracing.rst

2021-06-02 06:51:09 +02:00

trace.h

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xilinx_axidma.c

hw/dma/xilinx_axidma: Rename StreamSlave as StreamSink

2020-12-10 12:15:04 -05:00

xlnx_csu_dma.c

hw: Remove superfluous includes of hw/hw.h

2021-05-02 17:24:50 +02:00

xlnx_dpdma.c

util/hexdump: Reorder qemu_hexdump() arguments

2020-09-11 21:25:59 +02:00

xlnx-zdma.c

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xlnx-zynq-devcfg.c

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