qemu/target/riscv/tcg
Max Chou c9b07fe14d target/riscv: rvv: Remove the dependency of Zvfbfmin to Zfbfmin
According to the Zvfbfmin definition in the RISC-V BF16 extensions spec,
the Zvfbfmin extension only requires either the V extension or the
Zve32f extension.

Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240321170929.1162507-1-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-03-22 15:31:09 +10:00
..
meson.build
tcg-cpu.c target/riscv: rvv: Remove the dependency of Zvfbfmin to Zfbfmin 2024-03-22 15:31:09 +10:00
tcg-cpu.h target/riscv: add riscv_cpu_accelerator_compatible() 2023-11-07 11:06:02 +10:00