Marc-André Lureau 074d5afe7c i386/dump: use DIV_ROUND_UP ... I used the clang-tidy qemu-round check to generate the fix: https://github.com/elmarco/clang-tools-extra Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>		2017-08-31 12:29:07 +02:00
..
alpha	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
arm	target/arm: Require alignment for load exclusive	2017-08-15 17:38:44 +01:00
cris	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
hppa	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
i386	i386/dump: use DIV_ROUND_UP	2017-08-31 12:29:07 +02:00
lm32	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
m68k	m68k/translate: fix incorrect copy/paste	2017-07-31 13:06:39 +03:00
microblaze	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
mips	target/mips: Fix RDHWR CC with icount	2017-08-02 22:18:13 +01:00
moxie	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
nios2	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
openrisc	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
ppc	ppc: use DIV_ROUND_UP	2017-08-31 12:29:07 +02:00
s390x	target/s390x: Fix CSST for 16-byte store	2017-08-03 10:58:50 -07:00
sh4	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
sparc	trace-events: fix code style: print 0x before hex numbers	2017-08-01 12:13:07 +01:00
tilegx	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00
tricore	qemu-system-tricore: segfault when entering "x 0" on the monitor	2017-07-31 13:06:38 +03:00
unicore32	unicore32: abort when entering "x 0" on the monitor	2017-08-14 13:06:54 +03:00
xtensa	tcg: Pass generic CPUState to gen_intermediate_code()	2017-07-19 14:45:16 -07:00