97ba42230b
Microchip PolarFire SoC integrates a DMA engine that supports: * Independent concurrent DMA transfers using 4 DMA channels * Generation of interrupts on various conditions during execution which is actually an IP reused from the SiFive FU540 chip. This creates a model to support both polling and interrupt modes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-10-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
26 lines
236 B
Plaintext
26 lines
236 B
Plaintext
config RC4030
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bool
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config PL080
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bool
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config PL330
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bool
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config I82374
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bool
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select I8257
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config I8257
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bool
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config ZYNQ_DEVCFG
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bool
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select REGISTER
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config STP2000
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bool
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config SIFIVE_PDMA
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bool
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