qemu/tests/tcg/ppc64le/signal_save_restore_xer.c
Matheus Ferst 66c6b40aba linux-user/ppc: Fix XER access in save/restore_user_regs
We should use cpu_read_xer/cpu_write_xer to save/restore the complete
register since some of its bits are in other fields of CPUPPCState. A
test is added to prevent future regressions.

Fixes: da91a00f19 ("target-ppc: Split out SO, OV, CA fields from XER")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211014223234.127012-2-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-10-21 11:42:47 +11:00

43 lines
911 B
C

#include <assert.h>
#include <stdint.h>
#include <signal.h>
#include <sys/user.h>
#define XER_SO (1 << 31)
#define XER_OV (1 << 30)
#define XER_CA (1 << 29)
#define XER_OV32 (1 << 19)
#define XER_CA32 (1 << 18)
uint64_t saved;
void sigill_handler(int sig, siginfo_t *si, void *ucontext)
{
ucontext_t *uc = ucontext;
uc->uc_mcontext.regs->nip += 4;
saved = uc->uc_mcontext.regs->xer;
uc->uc_mcontext.regs->xer |= XER_OV | XER_OV32;
}
int main(void)
{
uint64_t initial = XER_CA | XER_CA32, restored;
struct sigaction sa = {
.sa_sigaction = sigill_handler,
.sa_flags = SA_SIGINFO
};
sigaction(SIGILL, &sa, NULL);
asm("mtspr 1, %1\n\t"
".long 0x0\n\t"
"mfspr %0, 1\n\t"
: "=r" (restored)
: "r" (initial));
assert(saved == initial);
assert(restored == (XER_OV | XER_OV32 | XER_CA | XER_CA32));
return 0;
}