f8a4c6d728
This builds vectorised versions of sha512 to exercise the vector code: - aarch64 (AdvSimd) - i386 (SSE) - s390x (MVX) - ppc64/ppc64le (power10 vectors) Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220225172021.3493923-14-alex.bennee@linaro.org>
30 lines
787 B
Makefile
30 lines
787 B
Makefile
# -*- Mode: makefile -*-
|
|
#
|
|
# ppc64le specific tweaks
|
|
|
|
VPATH += $(SRC_PATH)/tests/tcg/ppc64le
|
|
|
|
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
|
|
PPC64LE_TESTS=bcdsub non_signalling_xscv
|
|
endif
|
|
$(PPC64LE_TESTS): CFLAGS += -mpower8-vector
|
|
|
|
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER10),)
|
|
PPC64LE_TESTS += byte_reverse sha512-vector
|
|
endif
|
|
byte_reverse: CFLAGS += -mcpu=power10
|
|
run-byte_reverse: QEMU_OPTS+=-cpu POWER10
|
|
run-plugin-byte_reverse-with-%: QEMU_OPTS+=-cpu POWER10
|
|
|
|
sha512-vector: CFLAGS +=-mcpu=power10 -O3
|
|
sha512-vector: sha512.c
|
|
$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
|
|
|
|
run-sha512-vector: QEMU_OPTS+=-cpu POWER10
|
|
run-plugin-sha512-vector-with-%: QEMU_OPTS+=-cpu POWER10
|
|
|
|
PPC64LE_TESTS += mtfsf
|
|
PPC64LE_TESTS += signal_save_restore_xer
|
|
|
|
TESTS += $(PPC64LE_TESTS)
|