qemu/include/hw/intc
Peter Maydell 8ff41f3995 hw/intc/arm_gic_common: Configure IRQs as NS if doing direct NS kernel boot
If we directly boot a kernel in NonSecure on a system where the GIC
supports the security extensions then we must cause the GIC to
configure its interrupts into group 1 (NonSecure) rather than the
usual group 0, and with their initial priority set to the highest
NonSecure priority rather than the usual highest Secure priority.
Otherwise the guest kernel will be unable to use any interrupts.

Implement this behaviour, controlled by a flag which we set if
appropriate when the ARM bootloader code calls our ARMLinuxBootIf
interface callback.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1441383782-24378-4-git-send-email-peter.maydell@linaro.org
2015-09-08 17:38:43 +01:00
..
allwinner-a10-pic.h hw/intc: add allwinner A10 interrupt controller 2013-12-17 20:12:51 +00:00
arm_gic_common.h hw/intc/arm_gic_common: Configure IRQs as NS if doing direct NS kernel boot 2015-09-08 17:38:43 +01:00
arm_gic.h arm_gic: Extract headers hw/intc/arm_gic{,_common}.h 2013-11-05 17:47:29 +01:00
imx_avic.h i.MX: Split AVIC emulator in a header file and a source file 2015-08-13 11:26:19 +01:00
realview_gic.h realview_gic: Prepare for QOM embedding 2013-11-05 17:47:30 +01:00