qemu/target/microblaze
Edgar E. Iglesias 622cc7305c target/microblaze: Add the div-zero-exception property
Add the div-zero-exception property to control if the core
traps divizions by zero.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2020-04-30 12:11:03 +02:00
..
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
cpu.c target/microblaze: Add the div-zero-exception property 2020-04-30 12:11:03 +02:00
cpu.h target/microblaze: Add the div-zero-exception property 2020-04-30 12:11:03 +02:00
gdbstub.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
helper.c tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-10 11:12:50 -07:00
helper.h target-microblaze: Add support for extended access to TLBLO 2018-05-29 09:35:14 +02:00
Makefile.objs
microblaze-decode.h Supply missing header guards 2019-06-12 13:20:21 +02:00
mmu.c target/microblaze: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
mmu.h Supply missing header guards 2019-06-12 13:20:21 +02:00
op_helper.c target/microblaze: Add the div-zero-exception property 2020-04-30 12:11:03 +02:00
translate.c target/microblaze: Add the ill-opcode-exception property 2020-04-30 12:11:03 +02:00