qemu/include/hw/ssi
Cédric Le Goater 7c8d2fc4f9 aspeed/smc: Add an address mask on segment registers
Only a limited set of bits are used for decoding the Start and End
addresses of the mapping window of a flash device.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
..
aspeed_smc.h aspeed/smc: Add an address mask on segment registers 2022-02-26 18:40:51 +01:00
imx_spi.h hw/ssi: imx_spi: Use a macro for number of chip selects supported 2021-02-02 17:00:54 +00:00
mss-spi.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
npcm7xx_fiu.h hw/ssi: NPCM7xx Flash Interface Unit device model 2020-09-14 14:24:59 +01:00
pl022.h arm: Update infocenter.arm.com URLs 2021-02-11 11:50:14 +00:00
sifive_spi.h hw/ssi: Add SiFive SPI controller support 2021-03-04 09:43:29 -05:00
ssi.h hw/ssi: Rename SSI 'slave' as 'peripheral' 2020-12-10 12:15:03 -05:00
stm32f2xx_spi.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
xilinx_spips.h hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips 2021-03-10 13:54:51 +00:00
xlnx-versal-ospi.h hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller 2022-01-28 14:29:46 +00:00