qemu/include/disas
Frédéric Pétrot 332dab6878 target/riscv: setup everything for rv64 to support rv128 execution
This patch adds the support of the '-cpu rv128' option to
qemu-system-riscv64 so that we can indicate that we want to run rv128
executables.
Still, there is no support for 128-bit insns at that stage so qemu fails
miserably (as expected) if launched with this option.

Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
Co-authored-by: Fabien Portas <fabien.portas@grenoble-inp.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220106210108.138226-8-frederic.petrot@univ-grenoble-alpes.fr
[ Changed by AF
 - Rename CPU to "x-rv128"
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-01-08 15:46:10 +10:00
..
capstone.h Normalize header guard symbol definition. 2019-05-13 08:58:55 +02:00
dis-asm.h target/riscv: setup everything for rv64 to support rv128 execution 2022-01-08 15:46:10 +10:00
disas.h tcg: Introduce tcg_splitwx_to_{rx,rw} 2021-01-07 05:09:41 -10:00