qemu/target/i386/tcg
Richard Henderson 60b54b67c6 target/i386: Introduce X86Access and use for xsave and friends
linux-user/i386: Fix allocation and alignment of fp state in signal frame
 -----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZT2GwdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV87pQf9F/cmrKQG1mVWKmJd
 MI7l63lbxejdgAADv1nmro+oapCsJSaQeUSrYp904ydqJjVfBJkaoXfknGsvxrNA
 oW7nEuYt0sBKdaBUKhYpMOJ3ivfw7lVVMJmjNv9ngZRhW+WOoJrBHoleUkVLiM7D
 rxkMLL+LQ7BR9i0Lv1unorOkqUPGNOnEd45qRn6k1g/Qnqi8SNMzxFwO8+232u8m
 EG9un/oh4mKPyb5vSg3Y4JLg+yDKCRScBqBU1wcKFe1u+umBkv2BNcU+k62AJh1q
 bv8i1n+X/dFAd1aj0NEupi04EOZIof5m3T4YIWg7M4I94NiFWNZ18vgskkmiO+Mo
 0KPd/A==
 =sYrE
 -----END PGP SIGNATURE-----

Merge tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu into staging

target/i386: Introduce X86Access and use for xsave and friends
linux-user/i386: Fix allocation and alignment of fp state in signal frame

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZT2GwdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV87pQf9F/cmrKQG1mVWKmJd
# MI7l63lbxejdgAADv1nmro+oapCsJSaQeUSrYp904ydqJjVfBJkaoXfknGsvxrNA
# oW7nEuYt0sBKdaBUKhYpMOJ3ivfw7lVVMJmjNv9ngZRhW+WOoJrBHoleUkVLiM7D
# rxkMLL+LQ7BR9i0Lv1unorOkqUPGNOnEd45qRn6k1g/Qnqi8SNMzxFwO8+232u8m
# EG9un/oh4mKPyb5vSg3Y4JLg+yDKCRScBqBU1wcKFe1u+umBkv2BNcU+k62AJh1q
# bv8i1n+X/dFAd1aj0NEupi04EOZIof5m3T4YIWg7M4I94NiFWNZ18vgskkmiO+Mo
# 0KPd/A==
# =sYrE
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 26 May 2024 05:48:44 PM PDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-lu-20240526' of https://gitlab.com/rth7680/qemu: (28 commits)
  target/i386: Pass host pointer and size to cpu_x86_{xsave,xrstor}
  target/i386: Pass host pointer and size to cpu_x86_{fxsave,fxrstor}
  target/i386: Pass host pointer and size to cpu_x86_{fsave,frstor}
  target/i386: Convert do_xrstor to X86Access
  target/i386: Convert do_xsave to X86Access
  linux-user/i386: Honor xfeatures in xrstor_sigcontext
  linux-user/i386: Fix allocation and alignment of fp state
  linux-user/i386: Return boolean success from xrstor_sigcontext
  linux-user/i386: Return boolean success from restore_sigcontext
  linux-user/i386: Fix -mregparm=3 for signal delivery
  linux-user/i386: Split out struct target_fregs_state
  linux-user/i386: Replace target_fpstate_fxsave with X86LegacyXSaveArea
  linux-user/i386: Remove xfeatures from target_fpstate_fxsave
  linux-user/i386: Drop xfeatures_size from sigcontext arithmetic
  target/i386: Add {hw,sw}_reserved to X86LegacyXSaveArea
  target/i386: Add rbfm argument to cpu_x86_{xsave,xrstor}
  target/i386: Split out do_xsave_chk
  target/i386: Convert do_xrstor_* to X86Access
  target/i386: Convert do_xsave_* to X86Access
  tagret/i386: Convert do_fxsave, do_fxrstor to X86Access
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-05-26 17:51:00 -07:00
..
sysemu exec/cpu: Extract page-protection definitions to page-protection.h 2024-05-06 11:17:15 +02:00
user target/i386: implement SYSCALL/SYSRET in 32-bit emulators 2023-06-26 10:23:56 +02:00
access.c target/i386: Add tcg/access.[ch] 2024-05-26 12:51:50 -07:00
access.h target/i386: Add tcg/access.[ch] 2024-05-26 12:51:50 -07:00
bpt_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
cc_helper_template.h.inc target/i386: Rename helper template headers as '.h.inc' 2023-06-13 11:28:58 +02:00
cc_helper.c target/i386: clean up cpu_cc_compute_all 2023-12-29 22:03:02 +01:00
decode-new.c.inc target/i386: clean up AAM/AAD 2024-05-22 15:53:30 +02:00
decode-new.h target/i386: move prefetch and multi-byte UD/NOP to new decoder 2024-05-10 15:45:14 +02:00
emit.c.inc target/i386: remove aflag argument of gen_lea_v_seg 2024-05-25 13:28:02 +02:00
excp_helper.c target/i386: remove unnecessary arguments from raise_interrupt 2023-12-29 22:02:55 +01:00
fpu_helper.c target/i386: Introduce X86Access and use for xsave and friends 2024-05-26 17:51:00 -07:00
helper-tcg.h target/i386: Extract x86_cpu_exec_halt() from accel/tcg/ 2024-01-29 21:04:10 +10:00
int_helper.c target/i386: set CC_OP in helpers if they want CC_OP_EFLAGS 2024-05-25 13:28:01 +02:00
mem_helper.c target/i386: Inline cmpxchg16b 2023-02-04 06:19:43 -10:00
meson.build target/i386: Add tcg/access.[ch] 2024-05-26 12:51:50 -07:00
misc_helper.c target/i386: clean up cpu_cc_compute_all 2023-12-29 22:03:02 +01:00
mpx_helper.c i386: move TCG cpu class initialization to tcg/ 2020-12-16 15:50:33 -05:00
ops_sse_header.h.inc target/i386: implement SHA instructions 2023-10-25 17:35:07 +02:00
seg_helper.c target/i386: set CC_OP in helpers if they want CC_OP_EFLAGS 2024-05-25 13:28:01 +02:00
seg_helper.h i386: split seg_helper into user-only and sysemu parts 2021-05-10 15:41:52 -04:00
tcg-cpu.c target/i386: Extract x86_cpu_exec_halt() from accel/tcg/ 2024-01-29 21:04:10 +10:00
tcg-cpu.h target/i386: Move X86XSaveArea into TCG 2021-07-06 08:33:51 +02:00
tcg-stub.c
translate.c target/i386: remove aflag argument of gen_lea_v_seg 2024-05-25 13:28:02 +02:00