Lukas Stockner c08da86dc4 pcie: Support PCIe Gen5/Gen6 link speeds ... This patch extends the PCIe link speed option so that slots can be configured as supporting 32GT/s (Gen5) or 64GT/s (Gen5) speeds. This is as simple as setting the appropriate bit in LnkCap2 and the appropriate value in LnkCap and LnkCtl2. Signed-off-by: Lukas Stockner <lstockner@genesiscloud.com> Message-Id: <20240215012326.3272366-1-lstockner@genesiscloud.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2024-03-12 17:56:55 -04:00
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msi.h
msix.h
pci_bridge.h
pci_bus.h
pci_device.h
pci_host.h
pci_ids.h
pci_regs.h
pci.h	hw/pci: remove pci_nic_init_nofail()	2024-02-02 16:23:48 +00:00
pcie_aer.h
pcie_doe.h
pcie_host.h
pcie_port.h
pcie_regs.h	pcie: Support PCIe Gen5/Gen6 link speeds	2024-03-12 17:56:55 -04:00
pcie_sriov.h	pcie: Introduce pcie_sriov_num_vfs	2023-03-10 15:35:38 +08:00
pcie.h
shpc.h
slotid_cap.h