Michael Matz 5fa5469c08 target-arm: A64: Add SIMD ZIP/UZP/TRN ...

Add support for the SIMD ZIP/UZIP/TRN instruction group
(C3.6.3).

Signed-off-by: Michael Matz <matz@suse.de>
[PMM: use new do_vec_get/set etc functions and generally update to new
 codebase standards; refactor to pull per-element loop outside switch]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>

2014-01-31 14:47:31 +00:00

..

arm-semi.c

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cpu64.c

target-arm: Switch ARMCPUInfo arrays to use terminator entries

2014-01-14 10:09:04 +10:00

cpu-qom.h

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cpu.c

Merge remote branch 'luiz/queue/qmp' into qmpq

2014-01-14 12:10:08 +10:00

cpu.h

arm: fix compile on bigendian host

2014-01-12 21:37:37 +00:00

crypto_helper.c

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gdbstub64.c

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gdbstub.c

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helper-a64.c

target-arm: A64: Add SIMD TBL/TBLX

2014-01-31 14:47:31 +00:00

helper-a64.h

target-arm: A64: Add SIMD TBL/TBLX

2014-01-31 14:47:31 +00:00

helper.c

target-arm: A64: Add support for FCVT between half, single and double

2014-01-08 19:07:23 +00:00

helper.h

target-arm: A64: Add support for FCVT between half, single and double

2014-01-08 19:07:23 +00:00

iwmmxt_helper.c

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kvm32.c

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kvm64.c

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kvm_arm.h

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kvm-consts.h

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kvm-stub.c

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kvm.c

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machine.c

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Makefile.objs

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neon_helper.c

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op_addsub.h

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op_helper.c

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translate-a64.c

target-arm: A64: Add SIMD ZIP/UZP/TRN

2014-01-31 14:47:31 +00:00

translate.c

target-arm: Rename A32 VFP conversion helpers

2014-01-08 19:07:22 +00:00

translate.h

…