d1bb978ba1
Unlike the memory case, where "the destination operand receives a write cycle without regard to the result of the comparison", rm must not be touched altogether if the write fails, including not zero-extending it on 64-bit processors. This is not how the movcond currently works, because it is always followed by a gen_op_mov_reg_v to rm. To fix it, introduce a new function that is similar to gen_op_mov_reg_v but writes to a TCG temporary. Considering that gen_extu(ot, oldv) is not needed in the memory case either, the two cases for register and memory destinations are different enough that one might as well fuse the two "if (mod == 3)" into one. So do that too. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/508 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [rth: Add a test case ] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
29 lines
758 B
Makefile
29 lines
758 B
Makefile
# -*- Mode: makefile -*-
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#
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# x86_64 tests - included from tests/tcg/Makefile.target
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#
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# Currently we only build test-x86_64 and test-i386-ssse3 from
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# $(SRC_PATH)/tests/tcg/i386/
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#
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include $(SRC_PATH)/tests/tcg/i386/Makefile.target
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ifeq ($(filter %-linux-user, $(TARGET)),$(TARGET))
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X86_64_TESTS += vsyscall
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X86_64_TESTS += noexec
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X86_64_TESTS += cmpxchg
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TESTS=$(MULTIARCH_TESTS) $(X86_64_TESTS) test-x86_64
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else
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TESTS=$(MULTIARCH_TESTS)
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endif
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run-test-i386-ssse3: QEMU_OPTS += -cpu max
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run-plugin-test-i386-ssse3-%: QEMU_OPTS += -cpu max
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test-x86_64: LDFLAGS+=-lm -lc
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test-x86_64: test-i386.c test-i386.h test-i386-shift.h test-i386-muldiv.h
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$(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)
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%: $(SRC_PATH)/tests/tcg/x86_64/%.c
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$(CC) $(CFLAGS) $< -o $@ $(LDFLAGS)
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