5d6acdd4a4
This allows writing 2 output, 3 input operations. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
315 lines
14 KiB
C
315 lines
14 KiB
C
/*
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* Generic vector operation expansion
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*
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* Copyright (c) 2018 Linaro
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* "Generic" vectors. All operands are given as offsets from ENV,
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* and therefore cannot also be allocated via tcg_global_mem_new_*.
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* OPRSZ is the byte size of the vector upon which the operation is performed.
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* MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared.
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*
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* All sizes must be 8 or any multiple of 16.
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* When OPRSZ is 8, the alignment may be 8, otherwise must be 16.
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* Operands may completely, but not partially, overlap.
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*/
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/* Expand a call to a gvec-style helper, with pointers to two vector
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operands, and a descriptor (see tcg-gvec-desc.h). */
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typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32);
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void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
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uint32_t oprsz, uint32_t maxsz, int32_t data,
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gen_helper_gvec_2 *fn);
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/* Similarly, passing an extra data value. */
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typedef void gen_helper_gvec_2i(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32);
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void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
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uint32_t oprsz, uint32_t maxsz, int32_t data,
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gen_helper_gvec_2i *fn);
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/* Similarly, passing an extra pointer (e.g. env or float_status). */
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typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
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void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
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TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
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int32_t data, gen_helper_gvec_2_ptr *fn);
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/* Similarly, with three vector operands. */
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typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
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void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
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uint32_t oprsz, uint32_t maxsz, int32_t data,
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gen_helper_gvec_3 *fn);
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/* Similarly, with four vector operands. */
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typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr,
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TCGv_ptr, TCGv_i32);
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void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
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uint32_t cofs, uint32_t oprsz, uint32_t maxsz,
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int32_t data, gen_helper_gvec_4 *fn);
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/* Similarly, with five vector operands. */
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typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
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TCGv_ptr, TCGv_i32);
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void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
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uint32_t cofs, uint32_t xofs, uint32_t oprsz,
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uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn);
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typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
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TCGv_ptr, TCGv_i32);
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void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
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TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
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int32_t data, gen_helper_gvec_3_ptr *fn);
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typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
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TCGv_ptr, TCGv_ptr, TCGv_i32);
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void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
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uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz,
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uint32_t maxsz, int32_t data,
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gen_helper_gvec_4_ptr *fn);
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/* Expand a gvec operation. Either inline or out-of-line depending on
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the actual vector size and the operations supported by the host. */
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typedef struct {
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/* Expand inline as a 64-bit or 32-bit integer.
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Only one of these will be non-NULL. */
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void (*fni8)(TCGv_i64, TCGv_i64);
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void (*fni4)(TCGv_i32, TCGv_i32);
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/* Expand inline with a host vector type. */
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void (*fniv)(unsigned, TCGv_vec, TCGv_vec);
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/* Expand out-of-line helper w/descriptor. */
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gen_helper_gvec_2 *fno;
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/* The opcode, if any, to which this corresponds. */
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TCGOpcode opc;
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/* The data argument to the out-of-line helper. */
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int32_t data;
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/* The vector element size, if applicable. */
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uint8_t vece;
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/* Prefer i64 to v64. */
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bool prefer_i64;
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} GVecGen2;
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typedef struct {
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/* Expand inline as a 64-bit or 32-bit integer.
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Only one of these will be non-NULL. */
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void (*fni8)(TCGv_i64, TCGv_i64, int64_t);
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void (*fni4)(TCGv_i32, TCGv_i32, int32_t);
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/* Expand inline with a host vector type. */
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void (*fniv)(unsigned, TCGv_vec, TCGv_vec, int64_t);
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/* Expand out-of-line helper w/descriptor, data in descriptor. */
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gen_helper_gvec_2 *fno;
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/* Expand out-of-line helper w/descriptor, data as argument. */
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gen_helper_gvec_2i *fnoi;
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/* The opcode, if any, to which this corresponds. */
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TCGOpcode opc;
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/* The vector element size, if applicable. */
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uint8_t vece;
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/* Prefer i64 to v64. */
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bool prefer_i64;
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/* Load dest as a 3rd source operand. */
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bool load_dest;
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} GVecGen2i;
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typedef struct {
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/* Expand inline as a 64-bit or 32-bit integer.
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Only one of these will be non-NULL. */
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void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
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void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
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/* Expand inline with a host vector type. */
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void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
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/* Expand out-of-line helper w/descriptor. */
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gen_helper_gvec_2i *fno;
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/* The opcode, if any, to which this corresponds. */
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TCGOpcode opc;
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/* The data argument to the out-of-line helper. */
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uint32_t data;
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/* The vector element size, if applicable. */
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uint8_t vece;
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/* Prefer i64 to v64. */
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bool prefer_i64;
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/* Load scalar as 1st source operand. */
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bool scalar_first;
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} GVecGen2s;
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typedef struct {
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/* Expand inline as a 64-bit or 32-bit integer.
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Only one of these will be non-NULL. */
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void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
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void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
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/* Expand inline with a host vector type. */
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void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
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/* Expand out-of-line helper w/descriptor. */
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gen_helper_gvec_3 *fno;
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/* The opcode, if any, to which this corresponds. */
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TCGOpcode opc;
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/* The data argument to the out-of-line helper. */
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int32_t data;
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/* The vector element size, if applicable. */
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uint8_t vece;
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/* Prefer i64 to v64. */
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bool prefer_i64;
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/* Load dest as a 3rd source operand. */
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bool load_dest;
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} GVecGen3;
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typedef struct {
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/* Expand inline as a 64-bit or 32-bit integer.
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Only one of these will be non-NULL. */
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void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64);
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void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
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/* Expand inline with a host vector type. */
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void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec);
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/* Expand out-of-line helper w/descriptor. */
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gen_helper_gvec_4 *fno;
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/* The opcode, if any, to which this corresponds. */
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TCGOpcode opc;
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/* The data argument to the out-of-line helper. */
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int32_t data;
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/* The vector element size, if applicable. */
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uint8_t vece;
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/* Prefer i64 to v64. */
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bool prefer_i64;
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/* Write aofs as a 2nd dest operand. */
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bool write_aofs;
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} GVecGen4;
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void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
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uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
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void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
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uint32_t maxsz, int64_t c, const GVecGen2i *);
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void tcg_gen_gvec_2s(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
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uint32_t maxsz, TCGv_i64 c, const GVecGen2s *);
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void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs,
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uint32_t oprsz, uint32_t maxsz, const GVecGen3 *);
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void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
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uint32_t oprsz, uint32_t maxsz, const GVecGen4 *);
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/* Expand a specific vector operation. */
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void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_mul(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs,
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TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_subs(unsigned vece, uint32_t dofs, uint32_t aofs,
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TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs,
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TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
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/* Saturated arithmetic. */
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void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_nand(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_nor(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_eqv(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs,
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TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs,
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TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs,
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TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,
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uint32_t s, uint32_t m);
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void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
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uint32_t m, TCGv_i32);
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void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
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uint32_t m, TCGv_i64);
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void tcg_gen_gvec_dup8i(uint32_t dofs, uint32_t s, uint32_t m, uint8_t x);
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void tcg_gen_gvec_dup16i(uint32_t dofs, uint32_t s, uint32_t m, uint16_t x);
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void tcg_gen_gvec_dup32i(uint32_t dofs, uint32_t s, uint32_t m, uint32_t x);
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void tcg_gen_gvec_dup64i(uint32_t dofs, uint32_t s, uint32_t m, uint64_t x);
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void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t shift, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_shri(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t shift, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_sari(unsigned vece, uint32_t dofs, uint32_t aofs,
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int64_t shift, uint32_t oprsz, uint32_t maxsz);
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void tcg_gen_gvec_cmp(TCGCond cond, unsigned vece, uint32_t dofs,
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uint32_t aofs, uint32_t bofs,
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uint32_t oprsz, uint32_t maxsz);
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/*
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* 64-bit vector operations. Use these when the register has been allocated
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* with tcg_global_mem_new_i64, and so we cannot also address it via pointer.
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* OPRSZ = MAXSZ = 8.
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*/
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void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a);
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void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a);
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void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a);
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void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
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void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
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void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
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void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
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void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
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void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
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void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
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void tcg_gen_vec_shl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
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void tcg_gen_vec_shr8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
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void tcg_gen_vec_shr16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
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void tcg_gen_vec_sar8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
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void tcg_gen_vec_sar16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
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