qemu/include/hw/ppc
Suraj Jitindar Singh 5cc7e69f6d target/ppc: Work [S]PURR implementation and add HV support
The Processor Utilisation of Resources Register (PURR) and Scaled
Processor Utilisation of Resources Register (SPURR) provide an estimate
of the resources used by the thread, present on POWER7 and later
processors.

Currently the [S]PURR registers simply count at the rate of the
timebase.

Preserve this behaviour but rework the implementation to store an offset
like the timebase rather than doing the calculation manually. Also allow
hypervisor write access to the register along with the currently
available read access.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
[ clg: rebased on current ppc tree ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191128134700.16091-3-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17 10:39:48 +11:00
..
fdt.h target/ppc: Pass cpu instead of env to ppc_create_page_sizes_prop() 2018-04-27 18:05:22 +10:00
mac_dbdma.h mac_dbdma: remove DBDMA_init() function 2017-09-27 13:05:41 +10:00
openpic_kvm.h openpic: move KVM-specific declarations into separate openpic_kvm.h file 2018-03-06 13:16:29 +11:00
openpic.h hw/core: Move cpu.c, cpu.h from qom/ to hw/core/ 2019-08-21 13:24:01 +02:00
pnv_core.h ppc/pnv: Add a PnvChip pointer to PnvCore 2019-10-24 13:33:33 +11:00
pnv_homer.h hw/ppc/pnv_homer: add PowerNV homer device model 2019-10-04 10:25:23 +10:00
pnv_lpc.h ppc/pnv: add a LPC Controller model for POWER10 2019-12-17 10:39:48 +11:00
pnv_occ.h hw/ppc/pnv_occ: add sram device model for occ common area 2019-10-04 10:25:23 +10:00
pnv_pnor.h ppc/pnv: Add HIOMAP commands 2019-12-17 10:39:47 +11:00
pnv_psi.h ppc/pnv: add a PSI bridge model for POWER10 2019-12-17 10:39:48 +11:00
pnv_xive.h ppc/pnv: Introduce a pnv_xive_block_id() helper 2019-12-17 10:39:48 +11:00
pnv_xscom.h ppc/pnv: add a PSI bridge model for POWER10 2019-12-17 10:39:48 +11:00
pnv.h ppc/pnv: add a LPC Controller model for POWER10 2019-12-17 10:39:48 +11:00
ppc4xx.h Clean up inclusion of exec/cpu-common.h 2019-08-16 13:31:52 +02:00
ppc_e500.h intc/openpic: Build openpic only once 2013-07-09 21:33:02 +02:00
ppc.h target/ppc: Work [S]PURR implementation and add HV support 2019-12-17 10:39:48 +11:00
spapr_cpu_core.h spapr: Implement H_PROD 2019-08-21 17:17:12 +10:00
spapr_drc.h sysemu: Split sysemu/runstate.h off sysemu/sysemu.h 2019-08-16 13:37:36 +02:00
spapr_irq.h spapr: Pass the maximum number of vCPUs to the KVM interrupt controller 2019-12-17 10:39:48 +11:00
spapr_ovec.h spapr: Simplify ovec diff 2019-12-17 10:39:48 +11:00
spapr_rtas.h tests: add RTAS command in the protocol 2016-09-23 10:29:40 +10:00
spapr_tpm_proxy.h spapr: initial implementation for H_TPM_COMM/spapr-tpm-proxy 2019-08-21 17:17:12 +10:00
spapr_vio.h spapr: Replace spapr_vio_qirq() helper with spapr_vio_irq_pulse() helper 2019-10-04 19:08:22 +10:00
spapr_xive.h spapr: Pass the maximum number of vCPUs to the KVM interrupt controller 2019-12-17 10:39:48 +11:00
spapr.h spapr: Fold h_cas_compose_response() into h_client_architecture_support() 2019-12-17 10:39:48 +11:00
xics_spapr.h spapr: Pass the maximum number of vCPUs to the KVM interrupt controller 2019-12-17 10:39:48 +11:00
xics.h ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChip 2019-11-18 11:49:11 +01:00
xive_regs.h ppc/pnv: Dump the XIVE NVT table 2019-12-17 10:39:48 +11:00
xive.h ppc/pnv: Extend XiveRouter with a get_block_id() handler 2019-12-17 10:39:48 +11:00