qemu/target/riscv
Weiwei Li 6b1accefd4 target/riscv: expose zfinx, zdinx, zhinx{min} properties
Co-authored-by: ardxwe <ardxwe@gmail.com>
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220211043920.28981-7-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-03-03 13:14:50 +10:00
..
insn_trans target/riscv: add support for zhinx/zhinxmin 2022-03-03 13:14:50 +10:00
arch_dump.c
bitmanip_helper.c
cpu_bits.h
cpu_helper.c target/riscv: hardwire mstatus.FS to zero when enable zfinx 2022-03-03 13:14:50 +10:00
cpu_user.h
cpu-param.h
cpu.c target/riscv: expose zfinx, zdinx, zhinx{min} properties 2022-03-03 13:14:50 +10:00
cpu.h
csr.c target/riscv: hardwire mstatus.FS to zero when enable zfinx 2022-03-03 13:14:50 +10:00
fpu_helper.c target/riscv: add support for zhinx/zhinxmin 2022-03-03 13:14:50 +10:00
gdbstub.c
helper.h target/riscv: add support for zhinx/zhinxmin 2022-03-03 13:14:50 +10:00
insn16.decode
insn32.decode
instmap.h
internals.h target/riscv: add support for zhinx/zhinxmin 2022-03-03 13:14:50 +10:00
Kconfig
kvm_riscv.h
kvm-stub.c
kvm.c
m128_helper.c
machine.c
meson.build
monitor.c
op_helper.c
pmp.c
pmp.h
sbi_ecall_interface.h
trace-events
trace.h
translate.c target/riscv: add support for zdinx 2022-03-03 13:14:50 +10:00
vector_helper.c
XVentanaCondOps.decode