qemu/target
Peter Maydell 5c6295a45b target-arm queue:
* Add new mps3-an547 board
  * target/arm: Restrict v7A TCG cpus to TCG accel
  * Implement a Xilinx CSU DMA model
  * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210310' into staging

target-arm queue:
 * Add new mps3-an547 board
 * target/arm: Restrict v7A TCG cpus to TCG accel
 * Implement a Xilinx CSU DMA model
 * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()

# gpg: Signature made Wed 10 Mar 2021 13:56:20 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210310: (54 commits)
  hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()
  hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_
  hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips
  hw/ssi: xilinx_spips: Clean up coding convention issues
  hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI
  hw/arm: xlnx-zynqmp: Clean up coding convention issues
  hw/dma: Implement a Xilinx CSU DMA model
  target/arm: Restrict v7A TCG cpus to TCG accel
  tests/qtest/sse-timer-test: Test counter scaling changes
  tests/qtest/sse-timer-test: Test the system timer
  tests/qtest/sse-timer-test: Add simple test of the SSE counter
  docs/system/arm/mps2.rst: Document the new mps3-an547 board
  hw/arm/mps2-tz: Add new mps3-an547 board
  hw/arm/mps2-tz: Make initsvtor0 setting board-specific
  hw/arm/mps2-tz: Support running APB peripherals on different clock
  hw/misc/mps2-scc: Implement changes for AN547
  hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register
  hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate
  hw/arm/mps2-tz: Make UART overflow IRQ board-specific
  hw/arm/armsse: Add SSE-300 support
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-10 13:57:31 +00:00
..
alpha cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
arm target/arm: Restrict v7A TCG cpus to TCG accel 2021-03-08 17:20:04 +00:00
avr target/avr/cpu: Use device_class_set_parent_realize() 2021-02-20 12:36:19 +01:00
cris target/cris: Plug leakage of TCG temporaries 2021-02-22 09:04:58 +01:00
hexagon target/hexagon/opcodes: Add missing varargs cleanup 2021-03-06 17:35:43 -08:00
hppa exec: Use cpu_untagged_addr in g2h; split out g2h_untagged 2021-02-16 11:04:53 +00:00
i386 KVM: x86: do not fail if software breakpoint has already been removed 2021-03-06 11:41:54 +01:00
lm32 exec: Move TranslationBlock typedef to qemu/typedefs.h 2021-02-18 08:19:08 +00:00
m68k target/m68k: Drop use of gdb_get_float64() and ldfq_p() 2021-02-15 09:38:40 +00:00
microblaze cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
mips clock: Add ClockEvent parameter to callbacks 2021-03-08 17:20:01 +00:00
moxie exec: Move TranslationBlock typedef to qemu/typedefs.h 2021-02-18 08:19:08 +00:00
nios2 cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
openrisc cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
ppc sev/i386: Don't allow a system reset under an SEV-ES guest 2021-02-16 17:15:39 +01:00
riscv target-riscv: support QMP dump-guest-memory 2021-03-04 09:43:29 -05:00
rx cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
s390x target/s390x/kvm: Simplify debug code 2021-03-04 14:19:08 +01:00
sh4 target/sh4: Remove unused definitions 2021-03-06 16:18:42 +01:00
sparc cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
tilegx cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
tricore cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
unicore32 exec: Move TranslationBlock typedef to qemu/typedefs.h 2021-02-18 08:19:08 +00:00
xtensa cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
meson.build Hexagon build infrastructure 2021-02-18 08:25:06 -08:00