qemu/hw/dma
Thomas Huth 04bb79d1f5 hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1)
The M1 and M2 bits are both used for configuring the endianness
of the AHB master interfaces, so the second PL080_CONF_M1 should
be PL080_CONF_M2 instead.

Buglink: https://bugs.launchpad.net/qemu/+bug/1631773
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-id: 1476274451-26567-1-git-send-email-thuth@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-17 19:22:17 +01:00
..
bcm2835_dma.c
etraxfs_dma.c
i8257.c i8257: Make device "i8257" unavailable with -device 2016-09-13 19:09:43 +02:00
i82374.c
Makefile.objs dma: Add Xilinx Zynq devcfg device model 2016-07-04 13:15:22 +01:00
omap_dma.c hw/dma/omap: spelling fix: endianness 2016-09-13 18:12:34 +03:00
pl080.c hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1) 2016-10-17 19:22:17 +01:00
pl330.c
puv3_dma.c
pxa2xx_dma.c
rc4030.c hw/dma: vmstateify rc4030 2016-09-29 12:07:51 +01:00
soc_dma.c
sparc32_dma.c
sun4m_iommu.c
trace-events trace-events: fix first line comment in trace-events 2016-08-12 10:36:01 +01:00
xilinx_axidma.c Reducing stack frame size in stream_process_mem2s() 2016-10-17 19:22:16 +01:00
xlnx_dpdma.c
xlnx-zynq-devcfg.c dma: Add Xilinx Zynq devcfg device model 2016-07-04 13:15:22 +01:00