Peter Maydell 9ff9dd3c87 target-arm: Add AArch32 banked register access to secure physical timer ... If EL3 is AArch32, then the secure physical timer is accessed via banking of the registers used for the non-secure physical timer. Implement this banking. Note that the access controls for the AArch32 banked registers remain the same as the physical-timer checks; they are not the same as the controls on the AArch64 secure timer registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1437047249-2357-3-git-send-email-peter.maydell@linaro.org Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>		2015-08-13 11:26:22 +01:00
..
arm_ldst.h	softmmu: introduce cpu_ldst.h	2014-06-05 16:10:33 +02:00
arm-semi.c	target-arm: default empty semihosting cmdline	2015-06-26 14:22:36 +01:00
cpu64.c	target-arm: Fix REVIDR reset value	2015-06-15 18:06:08 +01:00
cpu-qom.h	target-arm: Add the AArch64 view of the Secure physical timer	2015-08-13 11:26:22 +01:00
cpu.c	target-arm: Add the AArch64 view of the Secure physical timer	2015-08-13 11:26:22 +01:00
cpu.h	target-arm: Add the AArch64 view of the Secure physical timer	2015-08-13 11:26:22 +01:00
crypto_helper.c	crypto: move built-in AES implementation into crypto/	2015-07-07 12:04:13 +02:00
gdbstub64.c	target-arm/gdbstub64.c: remove useless 'break' statement.	2014-04-17 21:34:06 +01:00
gdbstub.c
helper-a64.c	target-arm: A64: Print ELR when taking exceptions	2015-06-26 14:22:36 +01:00
helper-a64.h	target-arm: A64: Implement CRC instructions	2014-06-09 16:06:12 +01:00
helper.c	target-arm: Add AArch32 banked register access to secure physical timer	2015-08-13 11:26:22 +01:00
helper.h	target-arm: Split DISAS_YIELD from DISAS_WFE	2015-07-06 10:05:44 +01:00
internals.h	arm: Refactor get_phys_addr FSR return mechanism	2015-06-15 18:06:10 +01:00
iwmmxt_helper.c	target-arm: Delete unused iwmmxt_msadb helper	2014-06-09 16:06:12 +01:00
kvm32.c	target-arm: kvm: Differentiate registers based on write-back levels	2015-07-21 11:18:45 +01:00
kvm64.c	target-arm: kvm: Differentiate registers based on write-back levels	2015-07-21 11:18:45 +01:00
kvm_arm.h	Introduce gic_class_name() instead of repeating condition	2015-08-13 11:26:21 +01:00
kvm-consts.h	target-arm/kvm64: Add cortex-a53 cpu support	2015-06-15 18:06:08 +01:00
kvm-stub.c	target-arm: kvm: Differentiate registers based on write-back levels	2015-07-21 11:18:45 +01:00
kvm.c	target-arm: kvm: Differentiate registers based on write-back levels	2015-07-21 11:18:45 +01:00
machine.c	target-arm: kvm: Differentiate registers based on write-back levels	2015-07-21 11:18:45 +01:00
Makefile.objs	target-arm: add emulation of PSCI calls for system emulation	2014-10-24 12:19:13 +01:00
neon_helper.c	target-arm: add support for v8 VMULL.P64 instruction	2014-06-09 16:06:11 +01:00
op_addsub.h
op_helper.c	target-arm: Split DISAS_YIELD from DISAS_WFE	2015-07-06 10:05:44 +01:00
psci.c	target-arm: Use the kernel's idea of MPIDR if we're using KVM	2015-06-15 18:06:09 +01:00
translate-a64.c	target-arm: Split DISAS_YIELD from DISAS_WFE	2015-07-06 10:05:44 +01:00
translate.c	target-arm: Implement YIELD insn to yield in ARM and Thumb translators	2015-07-06 10:05:44 +01:00
translate.h	target-arm: Split DISAS_YIELD from DISAS_WFE	2015-07-06 10:05:44 +01:00