qemu/target/i386
Babu Moger ab8f992e3e i386: Add new property to control cache info
The property legacy-cache will be used to control the cache information.
If user passes "-cpu legacy-cache" then older information will
be displayed even if the hardware supports new information. Otherwise
use the statically loaded cache definitions if available.

Renamed the previous cache structures to legacy_*. If there is any change in
the cache information, then it needs to be initialized in builtin_x86_defs.

Signed-off-by: Babu Moger <babu.moger@amd.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Message-Id: <20180514164156.27034-3-babu.moger@amd.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-05-15 11:33:33 -03:00
..
hvf error: Strip trailing '\n' from error string arguments (again again) 2018-03-27 10:17:32 -05:00
Makefile.objs
TODO
arch_dump.c
arch_memory_mapping.c
bpt_helper.c
cc_helper.c
cc_helper_template.h
cpu-qom.h
cpu.c i386: Add new property to control cache info 2018-05-15 11:33:33 -03:00
cpu.h i386: Add new property to control cache info 2018-05-15 11:33:33 -03:00
excp_helper.c
fpu_helper.c
gdbstub.c
hax-all.c
hax-darwin.c
hax-darwin.h
hax-i386.h
hax-interface.h
hax-mem.c
hax-windows.c
hax-windows.h
helper.c icount: fix cpu_restore_state_from_tb for non-tb-exit cases 2018-04-11 09:05:22 +10:00
helper.h
hyperv-proto.h i386/kvm: add support for Hyper-V reenlightenment MSRs 2018-05-11 14:33:39 +02:00
hyperv.c
hyperv.h
int_helper.c
kvm-stub.c
kvm.c i386/kvm: add support for Hyper-V reenlightenment MSRs 2018-05-11 14:33:39 +02:00
kvm_i386.h
machine.c i386/kvm: add support for Hyper-V reenlightenment MSRs 2018-05-11 14:33:39 +02:00
mem_helper.c
misc_helper.c
monitor.c hmp: free sev info 2018-03-20 12:32:06 +00:00
mpx_helper.c
ops_sse.h
ops_sse_header.h
seg_helper.c
sev-stub.c
sev.c target/i386: sev: fix memory leaks 2018-05-09 00:13:39 +02:00
sev_i386.h
shift_helper_template.h
smm_helper.c
svm.h
svm_helper.c icount: fix cpu_restore_state_from_tb for non-tb-exit cases 2018-04-11 09:05:22 +10:00
trace-events
translate.c translator: merge max_insns into DisasContextBase 2018-05-09 10:12:21 -07:00
whpx-all.c target/i386: WHPX: set CPUID_EXT_HYPERVISOR bit 2018-04-09 16:36:38 +02:00
xsave_helper.c