Yongbok Kim cb269f273f target-mips: fix multiple TCG registers covering same data ...

Avoid to allocate different TCG registers for the FPU registers
that are mapped on the MSA vectore registers.

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>

2014-11-07 14:15:28 +00:00

..

cpu-qom.h

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cpu.c

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cpu.h

mips: Add macros for CP0.Config3 and CP0.Config4 bits

2014-11-07 14:15:28 +00:00

dsp_helper.c

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gdbstub.c

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helper.c

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helper.h

target-mips: add MSA MI10 format instructions

2014-11-03 11:48:35 +00:00

kvm_mips.h

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kvm.c

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lmi_helper.c

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machine.c

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Makefile.objs

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mips-defs.h

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msa_helper.c

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op_helper.c

target-mips: add MSA MI10 format instructions

2014-11-03 11:48:35 +00:00

TODO

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translate_init.c

mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits

2014-11-07 14:15:28 +00:00

translate.c

target-mips: fix multiple TCG registers covering same data

2014-11-07 14:15:28 +00:00