Michael Clark 5b4beba124 RISC-V Spike Machines ... RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V Instruction Set Simulator. The following machines are implemented: - 'spike_v1.9.1'; HTIF console, config-string, Privileged ISA Version 1.9.1 - 'spike_v1.10'; HTIF console, device-tree, Privileged ISA Version 1.10 Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>		2018-03-07 08:30:28 +13:00
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riscv_hart.h	RISC-V HART Array	2018-03-07 08:30:28 +13:00
riscv_htif.h
sifive_clint.h	SiFive RISC-V CLINT Block	2018-03-07 08:30:28 +13:00
sifive_plic.h	SiFive RISC-V PLIC Block	2018-03-07 08:30:28 +13:00
spike.h	RISC-V Spike Machines	2018-03-07 08:30:28 +13:00