Peter Maydell 5aff1c0744 mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA image ... Define a new board model for the MPS2 with an AN505 FPGA image containing a Cortex-M33. Since the FPGA images for TrustZone cores (AN505, and the similar AN519 for Cortex-M23) have a significantly different layout of devices to the non-TrustZone images, we use a new source file rather than shoehorning them into the existing mps2.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-20-peter.maydell@linaro.org		2018-03-02 11:03:45 +00:00
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allwinner-a10.c
armv7m.c
aspeed_soc.c
aspeed.c
bcm2835_peripherals.c
bcm2836.c
boot.c
collie.c
cubieboard.c
digic_boards.c
digic.c
exynos4_boards.c
exynos4210.c
fsl-imx6.c
fsl-imx25.c
fsl-imx31.c
gumstix.c
highbank.c
imx25_pdk.c
integratorcp.c
iotkit.c
kzm.c
mainstone.c
Makefile.objs
mps2-tz.c
mps2.c
msf2-soc.c
msf2-som.c
musicpal.c
netduino2.c
nseries.c
omap1.c
omap2.c
omap_sx1.c
palm.c
pxa2xx_gpio.c
pxa2xx_pic.c
pxa2xx.c
raspi.c
realview.c
sabrelite.c
spitz.c
stellaris.c
stm32f205_soc.c
strongarm.c
strongarm.h
sysbus-fdt.c
tosa.c
trace-events
versatilepb.c
vexpress.c
virt-acpi-build.c
virt.c
xilinx_zynq.c
xlnx-zcu102.c
xlnx-zynqmp.c
z2.c