ths 5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed ...

size.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162

2007-04-05 23:20:05 +00:00

..

cpu.h

64bit MIPS FPUs have 32 registers.

2007-04-05 23:14:23 +00:00

exec.h

Actually enable 64bit configuration.

2007-04-01 12:36:18 +00:00

fop_template.c

Preliminiary MIPS64 support, disabled by default due to performance impact.

2006-12-21 01:19:56 +00:00

helper.c

Handle EBase properly.

2007-04-05 23:18:13 +00:00

mips-defs.h

Actually enable 64bit configuration.

2007-04-01 12:36:18 +00:00

op_helper_mem.c

Actually enable 64bit configuration.

2007-04-01 12:36:18 +00:00

op_helper.c

Fix rotr immediate ops, mask shift/rotate arguments to their allowed

2007-04-05 23:20:05 +00:00

op_mem.c

Actually enable 64bit configuration.

2007-04-01 12:36:18 +00:00

op_template.c

Preliminiary MIPS64 support, disabled by default due to performance impact.

2006-12-21 01:19:56 +00:00

op.c

Fix rotr immediate ops, mask shift/rotate arguments to their allowed

2007-04-05 23:20:05 +00:00

TODO

Update mips TODO.

2007-03-30 18:56:19 +00:00

translate_init.c

Actually enable 64bit configuration.

2007-04-01 12:36:18 +00:00

translate.c

Fix rotr immediate ops, mask shift/rotate arguments to their allowed

2007-04-05 23:20:05 +00:00