Nicholas Miehlbradt 4091fabfeb target/ppc: Check DEXCR on hash{st, chk} instructions ... Adds checks to the hashst and hashchk instructions to only execute if enabled by the relevant aspect in the DEXCR and HDEXCR. This behaviour is guarded behind TARGET_PPC64 since Power10 is currently the only implementation which has the DEXCR. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Nicholas Miehlbradt <nicholas@linux.ibm.com> Message-Id: <20221220042330.2387944-3-nicholas@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>		2022-12-21 14:17:55 -03:00
..
translate	target/ppc: Use gvec to decode XVTSTDC[DS]P	2022-10-28 13:15:22 -03:00
arch_dump.c	dump: Replace opaque DumpState pointer with a typed one	2022-10-06 19:30:43 +04:00
compat.c
cpu_init.c	target/ppc: Implement the DEXCR and HDEXCR	2022-12-21 14:17:55 -03:00
cpu-models.c	target/ppc: Fix MPC8555 and MPC8560 core type to e500v1	2022-07-06 10:30:01 -03:00
cpu-models.h	target/ppc: Fix MPC8555 and MPC8560 core type to e500v1	2022-07-06 10:30:01 -03:00
cpu-param.h
cpu-qom.h	target/ppc: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
cpu.c	target/ppc: introduce ppc_maybe_interrupt	2022-10-28 13:15:22 -03:00
cpu.h	target/ppc: Implement the DEXCR and HDEXCR	2022-12-21 14:17:55 -03:00
dfp_helper.c	target/ppc: Set result to QNaN for DENBCD when VXCVI occurs	2022-09-20 10:54:06 -03:00
excp_helper.c	target/ppc: Check DEXCR on hash{st, chk} instructions	2022-12-21 14:17:55 -03:00
fpu_helper.c	target/ppc: Moved XSTSTDC[QDS]P to decodetree	2022-10-28 13:15:22 -03:00
gdbstub.c
helper_regs.c	target/ppc: Add new PMC HFLAGS	2022-10-28 13:15:23 -03:00
helper_regs.h
helper.h	target/ppc: Increment PMC5 with inline insns	2022-10-28 13:15:23 -03:00
insn32.decode	target/ppc: Moved XSTSTDC[QDS]P to decodetree	2022-10-28 13:15:22 -03:00
insn64.decode	target/ppc: Implemented [pm]xvbf16ger2*	2022-05-26 17:11:33 -03:00
int_helper.c	target/ppc: Move VABSDU[BHW] to decodetree and use gvec	2022-10-28 13:15:22 -03:00
internal.h	target/ppc: move the p*_interrupt_powersave methods to excp_helper.c	2022-10-28 13:15:22 -03:00
Kconfig
kvm_ppc.h	target/ppc/kvm: Add missing "cpu.h" and "exec/hwaddr.h"	2022-12-21 14:17:55 -03:00
kvm-stub.c
kvm.c	kvm: allow target-specific accelerator properties	2022-10-10 09:23:16 +02:00
machine.c	target/ppc: Fix host PVR matching for KVM	2022-08-30 16:20:29 -03:00
mem_helper.c
meson.build
misc_helper.c	target/ppc: always use ppc_set_irq to set env->pending_interrupts	2022-10-28 13:15:22 -03:00
mmu_common.c	target/ppc/mmu_common: Fix table layout of "info tlb" HMP command	2022-12-21 14:17:55 -03:00
mmu_helper.c	target/ppc: Implement ISA 3.00 tlbie[l]	2022-07-18 13:59:43 -03:00
mmu-book3s-v3.c	ppc: Check partition and process table alignment	2022-07-18 13:59:43 -03:00
mmu-book3s-v3.h	target/ppc: Implement ISA 3.00 tlbie[l]	2022-07-18 13:59:43 -03:00
mmu-books.h
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c	target/ppc: Implement slbiag	2022-07-18 13:59:43 -03:00
mmu-hash64.h
mmu-radix64.c	target/ppc: Fix regression in Radix MMU	2022-10-29 06:34:52 -03:00
mmu-radix64.h
monitor.c	target/ppc: check tb_env != 0 before printing TBU/TBL/DECR	2022-07-18 13:59:43 -03:00
power8-pmu-regs.c.inc	target/ppc: fix PMU Group A register read/write exceptions	2022-07-18 13:59:43 -03:00
power8-pmu.c	target/ppc: Increment PMC5 with inline insns	2022-10-28 13:15:23 -03:00
power8-pmu.h	target/ppc: Increment PMC5 with inline insns	2022-10-28 13:15:23 -03:00
spr_common.h	target/ppc: Implement the DEXCR and HDEXCR	2022-12-21 14:17:55 -03:00
tcg-stub.c
timebase_helper.c	target/ppc: fix exception error code in helper_{load, store}_dcr	2022-07-18 13:59:43 -03:00
trace-events
trace.h
translate.c	target/ppc: Implement the DEXCR and HDEXCR	2022-12-21 14:17:55 -03:00
user_only_helper.c